Laminate Semiconductor Structure for Simplified Capacitor Etching

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The manufacturing process for capacitors in semiconductor devices is complex due to the need to remove sacrificial materials and form high-k dielectric materials, which complicates the formation of the capacitor structure.

Innovation Solution

A laminate structure is formed with alternating sacrificial and support layers, where the support layers include doped areas with lower hardness, allowing for simultaneous removal through etching, simplifying the process by using dry and wet etching processes to form gaps and remove these layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If traditional sequential etching process is used to remove sacrificial material and form capacitor structure, then the capacitor structure can be formed, but the manufacturing process becomes complicated and time-consuming

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidmanufacturing cycle time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The patent combines the removal of sacrificial material and the formation of capacitor electrode structures into a single etching step. By designing the sacrificial layer with the same etch selectivity as the underlying layers, both the sacrificial material and the support structures are removed simultaneously, eliminating the need for separate etching steps and simplifying the manufacturing process

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent applies preliminary doping to the sacrificial layer before the etching process. This doping modifies the etch selectivity of the sacrificial layer in advance, ensuring that it can be removed together with the support layers during the same etching step, thereby preparing the structure for simultaneous removal before the actual fabrication begins

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If multiple separate etching steps are performed to remove different layers, then complete removal can be achieved, but the process complexity increases

Engineering Contradiction:
Improveprocess complexityVSAvoidlayer removal completeness
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies different doping concentrations and types to different regions of the sacrificial layer, creating local variations in etch selectivity. This allows the sacrificial layer to be removed at different rates in different areas during a single etching step, ensuring complete removal while maintaining control over the etching process and avoiding the need for multiple sequential steps

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method simplifies the manufacturing process by enabling simultaneous removal of doped areas and sacrificial layers, reducing complexity and maintaining structural integrity for the capacitor structure.

Implementation Method 1

Ion implantation is performed on a portion of each of the plurality of initial support layers to form a plurality of support layers each including a plurality of doped areas and a plurality of body areas

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

A first etching process is performed to form a plurality of first gaps penetrating through the plurality of body areas and the plurality of sacrificial layers in the laminate structure

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS12527010B2Method for forming semiconductor structure, laminate structure, and method for forming laminate structure
Publication Date: 2026.01.13 CHANGXIN MEMORY TECH INC
  • US12527010B2 patent drawing
  • US12527010B2 patent drawing
  • US12527010B2 patent drawing

AI summary

A method for forming a semiconductor structure and a method for forming a laminate structure include the following operations. A laminate structure is provided, the laminate structure including a plurality of sacrificial layers and a plurality of support layers alternately stacked on one another, each support layers includes a plurality of doped areas and a plurality of body areas. A first etching process is performed to form a plurality of first gaps penetrating through the plurality of body areas and the plurality of sacrificial layers in the laminate structure. A first material layer is deposited on inner walls of the plurality of first gaps. A second etching process is performed to remove the plurality of doped areas and the plurality of sacrificial layers to form a second gap between any two adjacent first gaps.