Laminate Electronic Device Carrier Recess Segmentation

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Solution Overview

Problem

Current methods for embedding semiconductor components into laminates face challenges in achieving low production costs, efficient electrical connections, and high versatility in circuit design and routing, particularly in portable electronic devices where size, thickness, and weight minimization are critical.

Innovation Solution

The method involves mounting semiconductor chips on a carrier with a recess structure, embedding them in an electrically insulating layer, and separating the carrier into parts along the recess pattern to form a laminate electronic device, which allows for efficient electrical connections and versatile circuit designs while minimizing size and weight.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If semiconductor chips are directly embedded into PCBs and build-up layers of SBU laminate substrates, then size and thickness are minimized, but production cost increases and manufacturing complexity increases

Engineering Contradiction:
Improvedevice sizeVSAvoidproduction cost
Core Design Contradiction:
Volume of moving objectVSEase of manufacture

Solution Approach 1:

The device is divided into modular components: semiconductor chips mounted on a carrier substrate, which is then embedded into the laminate substrate. This segmentation allows independent optimization of chip mounting and laminate fabrication processes, reducing overall manufacturing complexity while achieving compact form factor

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Semiconductor chips are pre-mounted on the carrier substrate before embedding into the laminate. This preliminary action enables separate optimization of chip assembly processes and laminate fabrication, reducing production costs while achieving miniaturization

Inventive Principle:
Principle #10Preliminary action

2Volume of moving object

If semiconductor chips are directly embedded into PCBs and build-up layers of SBU laminate substrates, then size and thickness are minimized, but device complexity increases

Engineering Contradiction:
Improvedevice sizeVSAvoidmanufacturing complexity
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The device structure is segmented into distinct functional modules: carrier substrate with mounted chips, embedding layer, and laminate substrate. This modular architecture simplifies the manufacturing process by allowing each module to be fabricated and assembled separately, reducing overall device complexity while maintaining compact dimensions

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A carrier substrate is introduced as an intermediary component between the semiconductor chips and the laminate substrate. This intermediary simplifies the embedding process by providing a stable mounting platform for chips, thereby reducing manufacturing complexity while achieving miniaturization

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If semiconductor chips are mounted on a carrier with recess structure and embedded in electrically insulating layer, then electrical connections become efficient and circuit design versatility increases, but manufacturing process complexity increases

Engineering Contradiction:
Improvecircuit design versatilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The carrier substrate incorporates localized recess structures at specific chip mounting positions, allowing optimized electrical connections and thermal management for each component location. This local customization enhances circuit design versatility while the standardized carrier design keeps overall manufacturing complexity manageable

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10020245B2Laminate electronic device
Publication Date: 2018.07.10 INFINEON TECHNOLOGIES AG
  • US10020245B2 patent drawing
  • US10020245B2 patent drawing
  • US10020245B2 patent drawing

AI summary

A method of manufacturing a laminate electronic device is disclosed. One embodiment provides a carrier, the carrier defining a first main surface and a second main surface opposite to the first main surface. The carrier has a recess pattern formed in the first main surface. A first semiconductor chip is attached on one of the first and second main surface. A first insulating layer overlying the main surface of the carrier on which the first semiconductor chip is attached and the first semiconductor chip is formed. The carrier is then separated into a plurality of parts along the recess pattern.