Laminate Thin Film Resistor for Zero-TCR Single-Step Patterning

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Solution Overview

Problem

The semiconductor industry faces challenges in fabricating thin film resistors with zero temperature coefficient of resistance (TCR) due to the need for multiple photolithography steps, which increase costs and process time, and existing thin film resistors often require separate steps for patterning and contact formation.

Innovation Solution

A laminate thin film resistor structure is developed, comprising multiple layers of different materials such as chromium-containing materials, titanium nitride, and tantalum nitride, with contact vias penetrating the top layers to terminate in the bottommost layer, allowing for a single photolithography step and reducing the effective TCR to substantially zero.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple photolithography steps are used to fabricate thin film resistors with zero TCR, then the temperature coefficient of resistance is reduced to substantially zero, but the manufacturing cost and process time increase

Engineering Contradiction:
Improvetemperature coefficient of resistanceVSAvoidprocess time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The resistor is divided into multiple thin film layers (first resistor layer, second resistor layer, third resistor layer) deposited sequentially. Each layer contributes to the overall resistance and TCR characteristics, allowing the composite structure to achieve zero TCR through proper material selection and thickness control, thereby eliminating the need for multiple photolithography steps.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs composite material structure with different resistor layers (e.g., chromium-containing material, titanium nitride, tantalum nitride) having different TCR characteristics. By combining materials with positive and negative TCR in a laminated structure, the overall TCR can be balanced to substantially zero, achieving the desired precision without additional processing steps.

Inventive Principle:
Principle #40Composite materials

2Manufacturing precision

If multiple photolithography steps are used to pattern contacts on thin film resistors, then precise contact alignment is achieved, but the manufacturing cost increases

Engineering Contradiction:
Improvecontact alignment precisionVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent combines the contact formation process with the resistor layer deposition process. Contact vias are formed through the resistor layers using a single photolithography step that patterns both the resistor structure and contact openings simultaneously, eliminating the need for separate photolithography steps for contact alignment and reducing manufacturing cost.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The photolithography process serves multiple functions: it patterns the resistor layers to achieve the desired resistance value, forms contact openings through all resistor layers, and defines the final resistor geometry. This multi-functional approach reduces the total number of processing steps and associated costs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250006777A1Thin film resistor
Publication Date: 2025.01.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250006777A1 patent drawing
  • US20250006777A1 patent drawing
  • US20250006777A1 patent drawing

AI summary

Resistors and method of forming the same are provided. A device structure according to the present disclosure includes a substrate, a first intermetal dielectric (IMD) layer over the substrate, a resistor that includes a first resistor layer over the first IMD layer, a second resistor layer over the first resistor layer, and a third resistor layer over the second resistor layer, a second IMD layer over the first IMD layer and the resistor, a first contact via extending through the second IMD layer and the third resistor layer and terminating in the first resistor layer, and a second contact via extending through the second IMD layer and the third resistor layer and terminating in the first resistor layer.