Laminate Substrate Via Chain for Early Microvia Crack Detection
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Solution Overview
Problem
Existing methods fail to effectively detect and predict via-cracking in laminate substrates at the unit level, leading to undetected defects until final product failure, which complicates root cause analysis and increases costs due to the complexity of substrate manufacturing and assembly processes.
Innovation Solution
Incorporating a built-in via chain at the unit level, manufactured using the same process as the substrate, with a large number of stacked or offset microvias to increase resistance and allow for detectable cracks, enabling unit-level integrity monitoring and early detection of via-cracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If microvias are used to interconnect across substrate layers, then signal routing between IC chip and PCB is enabled, but microvia cracking occurs due to mechanical stresses from temperature excursions and thermal fluctuations
Solution Approach 1:
The patent incorporates a via chain structure built into the substrate during manufacturing, which serves as a preliminary monitoring mechanism. This via chain is designed with specific electrical characteristics that allow detection of microvia cracking before it affects functional signal paths, enabling early intervention and preventing reliability failures.
Solution Approach 2:
The via chain acts as an intermediary monitoring structure that does not carry functional signals but provides indirect detection of microvia integrity. By measuring electrical properties of this intermediary structure, the system can infer the health of the main signal paths without directly monitoring them, thus resolving the contradiction between maintaining signal routing and ensuring microvia reliability.
2Ease of manufacture
If standard printed circuit board assembly techniques are used, then manufacturing simplicity is maintained, but cracking or compromise of microvias occurs leading to loss of signal integrity
Solution Approach 1:
The via chain monitoring structure is built into the substrate during the manufacturing process itself, before assembly occurs. This preliminary incorporation allows the monitoring capability to be integrated without adding post-manufacturing complexity, maintaining ease of manufacture while enabling precision detection of microvia cracking that would otherwise compromise signal integrity.
3Measurement precision
If unit-level detection methods are implemented, then early detection of via-cracking is achieved, but the complexity of substrate manufacturing and assembly processes increases
Solution Approach 1:
The patent merges the monitoring function with the existing substrate structure by incorporating the via chain during standard substrate manufacturing. Instead of adding separate detection systems or post-processing steps, the monitoring capability is combined with the substrate fabrication process itself, achieving unit-level detection precision without proportionally increasing manufacturing complexity.
Solution Approach 2:
The via chain structure serves multiple functions: it provides electrical connectivity within the substrate while simultaneously serving as a monitoring element for detecting microvia cracking. This multi-functionality allows unit-level detection capability to be achieved without adding separate dedicated monitoring structures, thereby limiting the increase in manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for the early detection of via-cracking at the unit level, reducing the likelihood of defects reaching the end customer and enabling zero Defects Per Million (DPPM) targets by integrating a via chain that can be tested throughout the product lifecycle.
Implementation Method 1
A first electrode on the lower surface is coupled to a second electrode on the lower surface by a chain of vias through the laminate substrate
Implementation Method 2
determining a resistance value across the chain of vias based upon voltage and current measurements generated using the voltage and current probes
Data Source
AI summary
An example semiconductor package comprises an integrated circuit die having a first surface with a first array of electrode pads. A laminate substrate has an upper surface with a second array of electrode pads. The electrode pads of the first array are connected to corresponding electrode pads of the second array using a solder bump. The laminate substrate has a lower surface with a third array of electrode pads. The electrodes of the third array are coupled to corresponding electrodes of the second array by a laminate wiring structure within the laminate substrate. A first electrode on the lower surface is coupled to a second electrode on the lower surface by a chain of vias through the laminate substrate. The chain of vias is not connected to the integrated circuit die.