Laminated Bus Structure with Ground Layers for SiC Switching

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Solution Overview

Problem

Wide bandgap semiconductor devices, such as silicon carbide (SiC), face challenges with parasitic inductance and electromagnetic interference (EMI) during commutation processes in power converters, leading to over-voltage, over-current stresses, and electromagnetic interference, which existing solutions often address at the cost of safety tradeoffs.

Innovation Solution

The implementation of laminated bus structures with stacked conductive layers and additional conductive ground layers to minimize parasitic inductance and EMI, utilizing insulation layers like fiberglass and ceramics to reduce flux density and induced electromotive force, and incorporating multiple ground layers to act as electromagnetic shields.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If laminated bus structures are used to reduce parasitic inductance, then switching capability is improved, but electromagnetic interference and electric field stress increase

Engineering Contradiction:
Improveswitching capabilityVSAvoidelectromagnetic interference
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

Conductive ground layers are introduced as intermediary elements between power conductors to intercept and divert electromagnetic fields. These ground layers act as mediators that capture electric field stress and redirect it to ground, preventing it from affecting sensitive components while maintaining the low-inductance laminated structure for high-speed switching

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The bus structure is segmented into multiple functional layers including power conductors, ground layers, and insulation layers. This segmentation allows each layer to perform its specific function: power layers handle current with minimal inductance, while interspersed ground layers provide EMI shielding and field stress management, enabling simultaneous optimization of switching speed and EMI reduction

Inventive Principle:
Principle #1Segmentation

2Object-affected harmful factors

If conductive ground layers are added as electromagnetic shields, then EMI is reduced, but device complexity increases

Engineering Contradiction:
Improveelectromagnetic interferenceVSAvoidstructure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The conductive ground layers serve multiple functions simultaneously: they provide EMI shielding, manage electric field stress, establish reference potentials, and offer thermal pathways. This multi-functionality reduces the need for separate dedicated shielding structures, thereby limiting the increase in device complexity while achieving comprehensive EMI reduction

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If insulation layers are used to manage electric field stress, then safety is improved, but parasitic inductance increases

Engineering Contradiction:
ImprovesafetyVSAvoidparasitic inductance
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

Instead of relying solely on increased insulation thickness (one-dimensional approach) to manage electric field stress, the invention introduces ground layers in the vertical stacking dimension. This allows electric field management through vertical field interception by ground planes, enabling thinner insulation layers and smaller loop areas, thereby reducing parasitic inductance while maintaining safety

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces parasitic inductance and EMI, allowing for closer placement of sensitive components, improved power density, and reduced EMI, while maintaining safety by effectively managing electric field stress and parasitic inductance.

Implementation Method 1

incorporating multiple ground layers to act as electromagnetic shields

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Implementation Method 2

reduce flux density and induced electromotive force

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Implementation Method 3

utilizing insulation layers like fiberglass and ceramics to reduce flux density and induced electromotive force

Methodology Applied
Scientific EffectDielectric insulation: Dielectric

Data Source

PatentUS11335649B2Low impedance multi-conductor layered bus structure with shielding
Publication Date: 2022.05.17 VIRGINIA TECH INTELLECTUAL PROPERTIES INC
  • US11335649B2 patent drawing
  • US11335649B2 patent drawing
  • US11335649B2 patent drawing

AI summary

Various embodiments of laminated planar bus structures that minimize electromagnetic interference (EMI) and parasitic inductance are described. In one embodiment, a laminated planar bus structure may include a plurality of stacked conductive layers and a plurality of stacked insulation layers. The plurality of stacked conductive layers may include positive and negative conductive layers, and conductive ground layers stacked as outer layers as to enclose vertically the positive and the negative conductive layers. In another embodiment, the laminated planar bus structure may include a middle ground layer stacked in between the positive and the negative conductive layers to provide additional reduction in electric field strength. A laminated planar bus structure that is integrated with other power electronics components is also presented.