Laminated Polymer Capacitor Electrode Layout for Heavy-Edge Contact
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Solution Overview
Problem
Existing thin film high polymer laminated capacitors face a decrease in electrostatic capacity due to the accumulation of vapor-deposited metal on the boundary parts of the vapor deposition mask, leading to a narrowed opening width and reduced capacitor performance.
Innovation Solution
A novel structure with a laminated chip design featuring dielectric layers and internal electrode layers, where the capacitor function region has a smaller electrode thickness and edge regions have a heavy edge structure, allowing for good contact with external electrodes and enhanced withstanding voltage characteristics, achieved through a manufacturing method involving alternating lamination and vapor deposition in a vacuum chamber.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the opening of the vapor deposition mask is expanded to increase metal layer thickness, then the electrode thickness is improved, but the vapor-deposited metal accumulates on the mask boundary parts, narrowing the opening width and decreasing electrostatic capacity
Solution Approach 1:
The invention divides the electrode structure into two distinct segments: a first metal layer with smaller thickness in the capacitor function region, and a second metal layer with larger thickness forming the heavy edge structure. This segmentation allows each layer to serve its specific function optimally without the negative effects of uniform thickness expansion
Solution Approach 2:
The invention applies different metal layer thicknesses to different regions: the capacitor function region maintains smaller electrode thickness for optimal capacitance, while the edge regions receive heavier metal deposition for improved contact and voltage withstanding. This local differentiation resolves the contradiction by optimizing each region for its specific requirement
2Reliability
If a heavy edge structure is formed to improve contact and voltage characteristics, then electrode performance is improved, but the opening width of the vapor deposition mask is narrowed, decreasing electrostatic capacity
Solution Approach 1:
The electrode structure is segmented into a capacitor function region with first metal layers and edge regions with second metal layers. The heavy edge structure is created only in the edge regions through selective vapor deposition, ensuring good contact and voltage characteristics without affecting the capacitor function region
Solution Approach 2:
Different quality characteristics are applied locally: the edge regions have heavy metal deposition for reliable contact and voltage withstanding, while the capacitor function region maintains lighter deposition to preserve opening width and electrostatic capacity. This local quality differentiation resolves the contradiction
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables the achievement of target electrostatic capacity, good contact with external electrodes, and improved withstanding voltage characteristics while maintaining a constant width in the capacitor function regions, thereby addressing the capacity reduction issues in existing designs.
Implementation Method 1
continuously vapor-depositing dielectric layers and internal electrode layers in vacuum
Implementation Method 2
irradiating the monomer layer to form the dielectric layer
Data Source
AI summary
A thin film high polymer laminated capacitor includes: a laminated chip including dielectric layers, and internal electrode layers including first metal layers including a first metal vapor-deposited on the dielectric layers, and second metal layers including a second metal vapor-deposited on the first metal layers. The dielectric layers and the internal electrode layers being laminated and bonded alternately, and external electrodes formed on one end and the other end of the laminated chip. The laminated chip having a first region having the first metal layers formed on the dielectric layers, which are laminated alternately, and edge regions having the second metal layers formed on layers connected to the one end and layers connected to the other end in the first metal layers, which are laminated alternately, the first region having a capacitor function region, and the edge region having a heavy edge.