Laminated Capacitor Wiring Substrate Design for High Capacitance and Insulation Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing wiring substrates with built-in capacitors face challenges in achieving both high capacitance and insulation resistance, as a high capacitance dielectric layer is thin, reducing insulation resistance, while a thick dielectric layer for insulation resistance limits capacitance, and the presence of defects in one capacitor affects the entire laminated capacitor.
Innovation Solution
A wiring substrate design with laminated capacitors where capacitors are embedded in a resin insulating layer, using offset electrodes and a ceramic dielectric layer of specific thickness, and via conductors to connect electrodes, ensuring high capacitance and insulation resistance, and using an adhesive with matching thermal expansion coefficients to prevent cracks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the dielectric layer is made thin to achieve high capacitance, then the capacitance increases, but the insulation resistance decreases
Solution Approach 1:
The capacitor is divided into multiple individual capacitors that are laminated together. Each capacitor has its own dielectric layer with sufficient thickness to maintain insulation resistance, while the combination of multiple capacitors in parallel achieves the required total capacitance. This segmentation allows each layer to be optimized for insulation while the overall structure provides high capacitance.
Solution Approach 2:
Multiple capacitors are combined through lamination to form a single laminated capacitor structure. The capacitors are connected in parallel, merging their capacitance values to achieve high total capacitance while each individual capacitor maintains adequate dielectric thickness for insulation resistance.
2Reliability
If the dielectric layer is made thick to secure insulation resistance, then the insulation resistance increases, but the capacitance decreases
Solution Approach 1:
Instead of using a single thick dielectric layer, the structure uses multiple thinner dielectric layers laminated together. Each layer maintains sufficient thickness for insulation, while the stacked configuration achieves the required capacitance through parallel connection of multiple capacitors.
Solution Approach 2:
The solution transitions from a single-layer planar structure to a multi-layer stacked structure. By adding the vertical dimension through lamination, the design achieves both adequate insulation thickness in each layer and high total capacitance through the combined effect of multiple layers.
3Quantity of substance
If a single capacitor is used to achieve high capacitance, then the capacitance is high, but a defect in the capacitor affects the entire capacitor
Solution Approach 1:
The capacitor is segmented into multiple individual capacitors laminated together. Each capacitor functions as an independent unit, so a defect in one capacitor does not affect the others. The individual capacitors are connected in parallel, allowing the overall structure to maintain functionality even when one unit is defective.
Solution Approach 2:
The design inherently provides redundancy by using multiple capacitors. This beforehand cushioning against defects ensures that even if one capacitor fails, the others continue to provide the required capacitance, thereby maintaining system reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a wiring substrate with both high capacitance and insulation resistance, reducing noise and preventing power supply delays, while ensuring the reliability and durability of the laminated capacitor by controlling thermal expansion and minimizing defects.
Implementation Method 1
using an adhesive with matching thermal expansion coefficients to prevent cracks
Data Source
Figure 1
Figure 2A~2C
Figure 2D
AI summary
The capacitors (350) are formed of the dielectric layer (330) and the first electrode (310) and the second electrode (320) mutually opposing with the dielectric layer (300) being sandwiched therebetween. The laminated capacitor (450) is such that the capacitors (350) are laminated via an adhesive (340). The wiring substrate (900) comprises the first resin insulating layer (200a) with the laminated capacitor (450) built-in, the first via conductors (411) electrically connecting the first electrodes (310) mutually, the second via conductors (412) electrically connecting the second electrodes (320) mutually, the first external terminals (427P) electrically connected to the first via conductors (411), and the second external terminals (427G) electrically connected to the second via conductors (412). The first electrodes (310) and the second electrodes (320) are disposed such that they are mutually offset in the direction of the electrode face.