Laminated Cavity Package for Semiconductor Stacking
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Solution Overview
Problem
Ceramic packages for semiconductor devices are costly and inefficient for high-density stacking applications due to the need for individual handling and lack of electrical connections for routing power and signals.
Innovation Solution
A cavity-type package using laminated circuit board materials with a riser and through-package vias for electrical connections, allowing for cost-effective stacking of fully tested packaged semiconductor components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ceramic packages are used for semiconductor devices, then reliable packaging is achieved, but manufacturing cost increases and handling efficiency decreases
Solution Approach 1:
The patent changes the material parameter from ceramic to organic substrate, maintaining the cavity package structure while reducing manufacturing cost and improving compatibility with standard PCB processes
Solution Approach 2:
The organic substrate serves multiple functions: it provides the cavity structure, electrical connections through vias, mechanical support, and compatibility with standard PCB manufacturing processes, eliminating the need for separate ceramic components
2Manufacturing precision
If ceramic units are handled individually, then precise positioning is achieved, but processing throughput decreases
Solution Approach 1:
The patent merges multiple individual ceramic unit functions into a single organic substrate that can accommodate multiple dies and provide all necessary electrical connections, enabling wafer-level processing and significantly improving throughput
3Reliability
If ceramic packages are used, then electrical isolation is achieved, but electrical connections for stacking are lost
Solution Approach 1:
The patent introduces through-substrate vias as intermediaries that provide electrical connections through the organic substrate, enabling both isolation between adjacent dies and connectivity for stacking multiple packages vertically
4Reliability
If individual ceramic units are loaded into trays, then protection during handling is achieved, but manufacturing time increases
Solution Approach 1:
The patent performs preliminary actions by integrating all necessary electrical connections and cavity structures into the organic substrate before die mounting, eliminating the need for subsequent tray loading and individual handling steps
Data Source
Figure 1~2A
Figure 2B~2C
Figure 2D~2E
AI summary
Packaged semiconductor components, apparatus for packaging semiconductor devices, methods of packaging semiconductor devices, and methods of manufacturing apparatus for packaging semiconductor devices. One embodiment of an apparatus for packaging semiconductor devices comprises a first board having a front side, a backside, arrays of die contacts, arrays of first backside terminals electrically coupled to the die contacts, arrays of second backside terminals, and a plurality of individual package areas that have an array of the die contacts, an array of the first backside terminals, and an array of the second backside terminals. The apparatus further includes a second board having a first side laminated to the front side of the first board, a second side, openings through the second board aligned with individual package areas that define die cavities, and arrays of front contacts at the second side electrically coupled to the second backside terminals by interconnects extending through the first board and the second board.