Laminated FET Sensor Structure for Sealed Electrodes and Low Gate Leakage
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Solution Overview
Problem
Existing FET devices using organic thin films and low-dimensional materials face challenges in commercialization due to fragility and gate leakage issues, which hinder their application in low-cost, flexible, and wearable electronic devices.
Innovation Solution
A laminated electronic sensor device is fabricated using a flexible substrate with conductive traces and a hot melt adhesive to form sealed electrodes, preventing direct contact with fluids and gases, and incorporating an electrolytic double layer for efficient gating, enabling roll-to-roll processing and high-throughput production.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If mechanical cutting is used to define interdigitated electrodes on substrate, then electrode pattern is formed, but substrate becomes fragile and difficult to manipulate
Solution Approach 1:
The patent divides the substrate into multiple layers (first substrate, second substrate, intermediate layer) that can be processed separately and then assembled. This allows the electrodes to be defined on one substrate without compromising the structural integrity of the overall device, as the layers work together to provide mechanical strength.
Solution Approach 2:
The patent embeds the first substrate containing the defined electrodes within the second substrate, creating a nested structure where the fragile patterned layer is protected by the surrounding structural layers. This nesting approach allows the electrodes to be precisely defined while the outer layers provide mechanical robustness.
2Ease of manufacture
If EVA layer is made extremely thin at electrode edges to match substrate edge, then substrate alignment is simplified, but gate leakage occurs reducing FET performance
Solution Approach 1:
The patent applies different thicknesses of the intermediate layer at different locations: thinner regions allow for alignment tolerance while thicker regions at the edges provide adequate insulation to prevent gate leakage. This local variation in layer thickness optimizes both manufacturing ease and device performance.
Solution Approach 2:
The patent incorporates an intermediate layer between the first and second substrates that acts as a buffer or cushion. This intermediate layer compensates for alignment variations and provides a safety margin that prevents direct contact between conductive elements, thereby preventing gate leakage while maintaining alignment simplicity.
3Productivity
If roll-to-roll processing is used for manufacturing, then production throughput and cost are improved, but device complexity increases
Solution Approach 1:
The patent divides the device into separate laminated layers that can be manufactured independently using roll-to-roll processing, then assembled together. This segmentation allows each layer to be optimized for its specific function and manufactured using appropriate processes, reducing overall complexity while maintaining high throughput.
Solution Approach 2:
The patent designs the laminated structure so that each layer serves multiple functions: the intermediate layer provides both alignment tolerance and electrical insulation, while the substrate layers provide both structural support and electrode integration. This multi-functionality reduces the total number of components needed, simplifying the overall device despite the laminated construction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides flexible, cost-effective, and reliable electronic devices suitable for wearable and diagnostic applications, with reduced gate leakage and improved manufacturing efficiency.
Implementation Method 1
a flexible first superstrate having a lower surface coated with a hot melt adhesive
Implementation Method 2
engineer an efficient gating of the FET by formation of an electrolytic double layer at the semiconducting channel surface
Data Source
AI summary
The present disclosure relates to a laminated electronic sensor device comprising: a substrate (110) having an upper surface (111), a flexible first superstrate (120) having a lower surface (122) coated with a hot melt adhesive, the first superstrate comprising at least one aperture (125), a thin conductive material (130) disposed on the upper surface (111) of the substrate (110), at least two spaced apart conductive traces (150, 160) making ohmic contact with the thin conductive material (130) to form source and drain electrodes defining a gate region, wherein the aperture (125) is disposed over an interior region of the thin conductive material (130) that is between the conductive traces (150, 160) to define a cavity (101), the conductive traces being sealed between the superstrate and the substrate by the hot melt adhesive to prevent exposure to a fluid or gas situated within the cavity (101).