Laminated common mode filter
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Solution Overview
Problem
Current common mode filters in high-speed signal transmission systems, such as those in mobile terminals, face challenges in maintaining uniform resistance and inductance of coil patterns and achieving wide band characteristics due to varying distances between coil patterns and changes in inductance characteristics.
Innovation Solution
A laminated common mode filter design featuring a stack body with specific coil patterns and a capacitance layer, where the coil patterns are uniformly spaced and connected through terminal patterns at the top and bottom, and an additional capacitance layer is positioned under the electrode stack to form additional capacitance and expand the attenuation band.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If coil patterns are arranged in conventional common mode filters, then the filter can remove common mode noise, but the resistance and inductance of coil patterns become non-uniform and the band characteristic is limited
Solution Approach 1:
The patent transitions from a planar arrangement of coil patterns to a three-dimensional stacked configuration. Multiple electrode layers are stacked vertically with coil patterns on each layer, and capacitance layers are inserted between electrode layers. This dimensional change allows uniform spacing between adjacent coil patterns across different layers, ensuring consistent resistance and inductance values while expanding the filter's operational bandwidth through enhanced magnetic coupling effects.
Solution Approach 2:
The patent implements a nested structure where capacitance layers are positioned between electrode layers, and coil patterns on different electrode layers are interleaved in the vertical dimension. This nesting arrangement creates consistent electromagnetic interaction between adjacent coil patterns while maintaining uniform electrical characteristics. The capacitive elements are nested within the electromagnetic field structure, providing both coupling and bandwidth expansion without disrupting the uniformity of coil pattern parameters.
2Ease of manufacture
If multiple via holes are used to connect coil patterns, then the coil patterns can be connected between layers, but the manufacturing complexity increases
Solution Approach 1:
The patent merges the functions of multiple via holes into shared via structures. Vias are positioned at the intersections of coil patterns across different electrode layers, allowing a single via to serve multiple connection purposes. This merging approach reduces the total number of via holes required while maintaining all necessary electrical connections between stacked coil patterns, thereby simplifying the manufacturing process and reducing structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design ensures uniform resistance and inductance of coil patterns, minimizes changes in inductance and common mode attenuation characteristics, improves magnetic coupling, and simplifies manufacturing by reducing the number of via holes, while expanding the attenuation band and maintaining a wide band characteristic.
Implementation Method 1
a capacitance layer constructed as a stack body including a capacitance pattern and a ground pattern, disposed under the lower electrode layer and configured to form additional capacitance by overlapping with the first coil pattern to the sixth coil pattern
Implementation Method 2
an upper electrode layer constructed as a stack body including a first coil pattern, a second coil pattern, and a third coil pattern
Data Source
AI summary
Disclosed is a laminated common mode filter which implements a wide band characteristic and in which the resistance and inductance of coil patterns configuring each channel are formed uniformly. The disclosed laminated common mode filter comprises: an upper electrode layer configured by a lamination comprising multiple coil patterns; a lower electrode layer configured by a lamination comprising multiple coil patterns and disposed under the upper electrode layer; and a capacitance layer configured by a lamination comprising a capacitance pattern and a ground pattern, disposed under the lower electrode layer, and overlapping the multiple coil patterns to form an additional capacitance.