Laminated Gate Insulator for Bend-Stable Thin Film Transistors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing thin film transistors face challenges in maintaining mobility and on/off ratio stability when bent due to deterioration of gate insulating coatings and semiconductor layers, leading to decreased electrical durability.
Innovation Solution
A thin film transistor design featuring a gate insulating layer with a laminate structure, comprising an organic polymer compound or organic-inorganic composite material for the first coating and silicon oxide, silicon nitride, or aluminum oxide for the second coating, with specific thickness and Young's modulus ranges to prevent cracking and maintain adhesion, along with a protective layer to safeguard the semiconductor layer during processing and exposure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gate insulating layer is used in thin film transistors, then electrical insulation is provided, but the gate insulating coating deteriorates when bent, leading to decreased mobility and on/off ratio stability
Solution Approach 1:
The gate insulating layer is divided into multiple distinct coatings: an inorganic coating layer, an organic coating layer, and an inorganic-organic interface layer. This segmentation allows each layer to perform its specific function - the inorganic layer provides insulation, the organic layer provides flexibility and adhesion, and the interface layer ensures bonding between them, preventing deterioration when bent.
Solution Approach 2:
The gate insulating layer uses a composite structure combining inorganic materials (such as silicon oxide, silicon nitride) with organic materials (such as polyimide, polyvinylidene fluoride). This composite approach integrates the advantages of both material types: inorganic materials provide electrical insulation and thermal stability, while organic materials provide flexibility, adhesion, and crack resistance during bending.
2Productivity
If the gate insulating layer is made thinner to reduce device size, then integration density increases, but cracking occurs during bending leading to mobility decrease
Solution Approach 1:
The organic coating layer acts as a flexible buffer that accommodates mechanical stress during bending. This layer prevents the thin inorganic gate insulating layer from cracking by absorbing and distributing the stress, enabling the use of thinner gate insulating layers for higher integration density without compromising crack resistance.
Solution Approach 2:
The patent optimizes the thickness parameters of each coating layer within specific ranges. The inorganic coating layer is kept thin (5-50 nm) for high integration density, while the organic coating layer has a greater thickness (50-200 nm) to provide sufficient flexibility and stress buffering, preventing cracking during bending operations.
3Ease of manufacture
If conventional gate insulating coatings are used, then manufacturing is simplified, but deterioration occurs leading to decreased on/off ratio stability
Solution Approach 1:
The inorganic-organic interface layer is formed between the inorganic and organic coating layers to preliminarily establish strong adhesion bonding. This preliminary bonding action prevents interface delamination and material deterioration during subsequent bending and processing steps, ensuring long-term on/off ratio stability.
Solution Approach 2:
The inorganic-organic interface layer serves as an intermediary between the inorganic gate insulating coating and the organic protective coating. This intermediate layer facilitates compatible bonding between the two dissimilar materials, ensuring both adhesion strength and electrical performance without complicating the manufacturing process.
Data Source
AI summary
A gate insulating layer of a thin film transistor includes a first gate insulating coating including an organic polymer compound or an organic-inorganic composite material, and a second gate insulating coating including one selected from a group of silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide. The second gate insulating coating is sandwiched between the first gate insulating coating and a semiconductor layer. The first gate insulating coating has a thickness of 100 nm or greater and 1500 nm or less, and a product of the thickness and Young's modulus of the first gate insulating coating is 300 nm·GPa or greater and 30000 nm·GPa or less. The second gate insulating coating has a thickness of 2 nm or greater and 30 nm or less, and a product of the thickness and Young's modulus of the second gate insulating coating is 100 nm·GPa or greater and 9000 nm·GPa or less.


