Laminated Solid-State Imaging Device Pixel Drive Circuit Timing
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Solution Overview
Problem
Existing CMOS solid-state imaging devices face challenges in driving pixels at high speeds while maintaining concurrency and reducing pixel blurring, due to delays and waveform distortions in drive pulses caused by parasitic resistance and capacitance, especially in large pixel arrays.
Innovation Solution
A solid-state imaging device is designed with a laminated structure, where a second chip with pixel drive circuits is placed beneath the first chip containing pixels, allowing for direct electrical connection via a connection unit, enabling concurrent exposure and readout operations with reduced delay and waveform distortion, and allowing for multi-point tuning corrections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single chip structure is used with vertical drive circuits arranged on one side, then the device complexity is reduced, but delay and waveform deformation occur in drive pulses supplied to distant pixels
Solution Approach 1:
The patent divides the pixel array into multiple regions, with separate pixel drive circuits assigned to each region. This segmentation allows each drive circuit to serve a localized area, reducing the distance drive pulses must travel and minimizing delay and waveform deformation while maintaining manageable device complexity.
Solution Approach 2:
The patent transitions from a two-dimensional layout with drive circuits on one side to a three-dimensional laminated structure where drive circuits are positioned beneath the pixel array. This dimensional change enables direct vertical connection to multiple pixel regions simultaneously, reducing horizontal signal travel distance and improving timing precision.
2Productivity
If pixels are driven at high speed, then productivity is improved, but pixel blurring increases due to delay and waveform distortion
Solution Approach 1:
By segmenting the pixel array into multiple regions with dedicated drive circuits, the patent enables high-speed driving of individual regions without the cumulative delay effects that would occur in a single long-distance signal path. This maintains image quality while improving overall productivity through parallel processing of multiple regions.
Solution Approach 2:
The patent implements local quality by providing each pixel region with its own optimized drive circuit, allowing high-speed driving locally without affecting other regions. This localized approach prevents pixel blurring in each region while maintaining high overall productivity through concurrent operation of multiple regions.
3Area of stationary object
If the pixel array is enlarged to increase the number of pixels, then the area is improved, but delay and waveform distortion increase due to parasitic resistance and capacitance
Solution Approach 1:
The patent segments the enlarged pixel array into multiple smaller regions, each served by its own pixel drive circuit. This segmentation prevents the timing precision degradation that would occur in a single large array by limiting signal travel distances within each region while maintaining the benefits of a large total pixel count.
Solution Approach 2:
The patent uses a laminated three-dimensional structure where pixel drive circuits are positioned beneath the pixel array, enabling vertical signal paths that serve multiple pixel regions. This dimensional change allows the pixel array area to be enlarged without proportionally increasing horizontal signal travel distances, maintaining timing precision across the expanded area.
4Manufacturing precision
If a laminated structure with pixel drive circuits beneath pixels is used, then timing precision is improved, but device complexity increases
Solution Approach 1:
The patent merges the pixel array and pixel drive circuits into a single laminated integrated structure. This combining approach improves timing precision through direct vertical connections while avoiding the complexity of completely separate modules, as the circuits are fabricated together in an integrated manner.
Solution Approach 2:
The patent implements a three-dimensional laminated structure where drive circuits are positioned beneath the pixel array with vertical connections. This dimensional reorganization improves timing precision by shortening signal paths while managing complexity through the regular, repeating pattern of the laminated structure that simplifies fabrication.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables high-speed pixel driving with concurrency, reduces pixel blurring, and simplifies the manufacturing process by eliminating the need for high withstand voltage ratings, while allowing for precise timing adjustments to prevent shading and synchronization issues.
Implementation Method 1
a light sensing unit PD having a photodiode... generating a signal charge in response to an amount of received light
Data Source
AI summary
A solid-state imaging device includes a first chip including a plurality of pixels, each pixel including a light sensing unit generating a signal charge responsive to an amount of received light, and a plurality of MOS transistors reading the signal charge generated by the light sensing unit and outputting the read signal charge as a pixel signal, a second chip including a plurality of pixel drive circuits supplying desired drive pulses to pixels, the second chip being laminated beneath the first chip in a manner such that the pixel drive circuits are arranged beneath the pixels formed in the first chip to drive the pixels, and a connection unit for electrically connecting the pixels to the pixel drive circuits arranged beneath the pixels.