Laminated Schottky Diode With Reduction Suppressing Layer
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Solution Overview
Problem
Existing Schottky barrier diodes face challenges with high forward on-resistance and reverse leakage current, leading to power loss and compatibility issues with other electronic materials, particularly in power semiconductors.
Innovation Solution
A laminated body structure comprising a substrate, an ohmic electrode layer, a metal oxide semiconductor layer, a Schottky electrode layer, and a buffer electrode layer, with a reduction suppressing layer between the Schottky electrode and buffer electrode layers, using specific metals like Pd, Mo, and Pt to reduce on-resistance and leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a Si-based Schottky barrier diode is used, then high-speed switching performance is achieved, but forward on-resistance increases and withstand voltage decreases
Solution Approach 1:
The patent uses a composite structure combining Si-based Schottky barrier diode and SiC-based drift layer. The Si-based diode provides high-speed switching performance, while the SiC-based drift layer provides high withstand voltage capability due to SiC's larger band gap (3 eV or more) and larger dielectric breakdown field (3 MV/cm). This composite approach resolves the contradiction by separating the functions of speed and voltage handling across different materials.
2Reliability
If the thickness of Si-based Schottky barrier diode is increased to achieve large withstand voltage, then voltage resistance improves, but forward on-resistance increases
Solution Approach 1:
The patent employs a composite structure where the SiC-based drift layer handles the voltage blocking function due to its superior breakdown field (3 MV/cm), allowing thin design. The Si-based Schottky barrier diode provides low on-resistance contact. This separation of functions in the composite structure resolves the contradiction between withstand voltage and forward on-resistance.
3Reliability
If SiC is used to achieve high withstand voltage, then voltage resistance and high-speed response improve, but mass productivity and cost worsen
Solution Approach 1:
The patent uses a composite structure where only the drift layer is made of SiC, which requires high-temperature epitaxial growth, while the diode structure itself uses Si-based materials that are easier to fabricate. This partial use of SiC minimizes the impact of SiC's difficult fabrication and high cost, while still obtaining the high withstand voltage benefit from SiC's large band gap (3 eV or more) and breakdown field.
4Reliability
If amorphous IGZO is used as oxide semiconductor with lateral current extraction, then Schottky barrier is formed, but current extraction capability and compatibility with electronic circuits worsen
Solution Approach 1:
The patent inverts the conventional current extraction direction. Instead of lateral current extraction as in oxide semiconductor diodes, this patent uses vertical current extraction where the Schottky barrier diode is formed on the front surface and current is extracted vertically through the drift layer to the back contact. This inversion enables compatibility with conventional electronic circuit configurations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a semiconductor device with low forward on-resistance and reverse leakage current, enabling efficient current extraction with minimal power loss and improved compatibility with other electronic materials.
Implementation Method 1
a reduction suppressing layer is provided between the Schottky electrode layer and the buffer electrode layer
Implementation Method 2
a potential barrier is formed at the metal-semiconductor interface. In this case, it is a diode with a metal side as a positive electrode and a semiconductor side as a negative electrode
Data Source
AI summary
A laminated body comprising a substrate, an ohmic electrode layer, a metal oxide semiconductor layer, a Schottky electrode layer and a buffer electrode layer in this order, wherein a reduction suppressing layer is provided between the Schottky electrode layer and the buffer electrode layer.