Laminated Shunt Resistor Layout for Smaller Semiconductor Packages
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Solution Overview
Problem
Existing shunt resistors in semiconductor devices often require larger form factors due to the need for separate mounting surfaces for electrodes, which can increase the size of the semiconductor device and hinder miniaturization efforts.
Innovation Solution
A shunt resistance design featuring a resistive element layer with first and second electrode layers laminated on both sides, allowing for compact mounting configurations and reduced device size by enabling the electrodes to be mounted on both sides of the resistive element layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If separate mounting surfaces for electrodes are provided, then the shunt resistor can be mounted properly, but the form factor increases
Solution Approach 1:
The electrode layers are integrated directly onto the resistive element layer, merging the electrode function with the resistive element structure. This eliminates the need for separate mounting surfaces while maintaining proper electrical connection and mounting capability.
Solution Approach 2:
The electrode layers are positioned on both sides of the resistive element layer in the thickness direction, utilizing the z-dimension for electrode placement. This allows mounting surfaces to be formed on both sides of the shunt resistor, reducing the planar footprint while maintaining mounting functionality.
2Area of stationary object
If the shunt resistor size is reduced, then device miniaturization is achieved, but mounting stability may be compromised
Solution Approach 1:
By positioning electrode layers on both sides of the resistive element layer in the thickness direction, the mounting surfaces are distributed across both sides of the shunt resistor. This three-dimensional electrode arrangement provides stable mounting capability while reducing the planar area occupied by the device.
Data Source
AI summary
Provided is a shunt resistance including a resistive element layer, a first electrode layer laminated on a first side in a thickness direction of the resistive element layer, and a second electrode layer laminated on a second side in the thickness direction of the resistive element layer.