Laminated Substrate Static Discharge via Resistivity Control
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Solution Overview
Problem
The manufacturing method of laminated semiconductor substrates using the lamination method often results in defects such as voids and blisters due to static electricity and particle adsorption, which complicates the bonding process and reduces yield.
Innovation Solution
Reducing the electric resistivity of the semiconductor substrates to 0.005-0.2 Ωcm to prevent static electricity and using a hydrogen ion implantation separation method, along with a reduction atmosphere containing hydrogen gas, to enhance bonding strength and prevent defects during heat treatment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the lamination method is used to manufacture laminated semiconductor substrates, then the manufacturing complexity is reduced compared to SIMOX method, but lamination defects such as voids and blisters occur due to particles and organic substances adhered to substrate surfaces
Solution Approach 1:
The patent applies preliminary action by performing plasma treatment on substrate surfaces before lamination to remove particles and organic substances in advance. The method also involves pre-heating substrates to specific temperature ranges (50-150°C) before bonding to prevent defect formation during the lamination process.
Solution Approach 2:
The patent changes physical parameters by controlling substrate temperature within 50-150°C range, adjusting plasma treatment conditions, and modifying atmospheric composition during lamination. These parameter changes optimize bonding conditions and reduce lamination defects while maintaining process simplicity.
2Manufacturing precision
If clean room environment and automated lamination apparatus are introduced to eliminate particles, then lamination defect rate is reduced, but manufacturing cost and process complexity increase
Solution Approach 1:
The patent applies self-service by enabling substrates to treat themselves through plasma treatment and controlled heating processes that remove contaminants and prepare surfaces for bonding. This self-preparation approach reduces reliance on complex external clean room facilities and automated handling systems.
Solution Approach 2:
The patent uses an inert or controlled atmosphere during lamination to prevent contamination and organic substance adhesion. By controlling the atmospheric environment with specific gas compositions and maintaining controlled humidity, the method reduces lamination defects without requiring extreme clean room conditions.
3Manufacturing precision
If substrate electric resistivity is reduced to 0.005-0.2 Ωcm to discharge static electricity, then particle adhesion is prevented and lamination quality improves, but substrate doping process complexity increases
Solution Approach 1:
The patent changes the electrical parameter of substrate resistivity to the specific range of 0.005-0.2 Ωcm to optimize static electricity discharge. This parameter change is achieved through controlled doping processes that balance electrical properties with mechanical and thermal characteristics required for lamination.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the generation of voids and blisters, improves the mechanical strength of the laminated substrate, and increases the yield of the laminated substrate by effectively discharging static electricity and constraining particle adhesion.
Implementation Method 1
forming an oxide film in a first semiconductor substrate to be an active layer
Implementation Method 2
utilizing an SIMOX (Separation by IMplanted OXygen) method of forming the oxide film within a silicon substrate by ion implantation of oxygen
Implementation Method 3
electric resistivity of either or both of the first and second semiconductor substrates prior to the superimposition is 0.005-0.2 Ωcm
Data Source
AI summary
Adhesion of particles due to static buildup during a laminated substrate manufacturing process is constrained, so as to reduce generation of a void or a blister in a lamination step and improve yield. A laminate 13 is formed by superimposing a first semiconductor substrate 11, which is to be an active layer, on a second semiconductor substrate 12, which is to be a supporting substrate, via an oxide film 11a. Electric resistance of either or both of the first and second semiconductor substrates 11 and 12 before superimposition is 0.005-0.2 Ωcm.