Laminated Substrate Thermal Vias for Inter-Chip Bridge Cooling

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Solution Overview

Problem

Inter-chip bridges in semiconductor circuits generate heat, which is inefficiently dissipated through the bridge-chip interconnects, leading to increased thermal resistance and potential circuit failure due to rising temperatures.

Innovation Solution

A semiconductor package design featuring a laminated substrate with embedded metal lines and vias for enhanced thermal connectivity, a heat-conductive lid, and thermal interface materials to direct heat away from chips and bridges to the package periphery, where it can be dissipated efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If heat is conducted through the bridge-chip interconnects, then heat transfer occurs, but thermal resistance increases and temperature rises

Engineering Contradiction:
Improvebridge temperatureVSAvoidcircuit reliability
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The patent segments the heat conduction path by introducing separate thermal vias and heat spreader structures that divide the heat flow into multiple independent paths. This segmentation allows heat to be conducted away from the bridge without necessarily passing through the chip interconnects, reducing thermal resistance and temperature while maintaining circuit reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediary thermal management structures including thermal interface materials, heat spreaders, and thermal vias that act as mediators between the heat-generating bridge and the heat sink. These intermediary structures provide dedicated thermal conduction paths that reduce the thermal burden on the electrical interconnects, thereby lowering temperature and improving reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of energy

If additional thermal conduction paths are added, then heat dissipation efficiency improves, but device complexity increases

Engineering Contradiction:
Improveheat dissipation efficiencyVSAvoidpackage structure complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent merges thermal management functions with existing package structures by integrating heat spreaders into the substrate and combining thermal vias with electrical via structures. This merging approach adds thermal conduction paths without proportionally increasing device complexity, as shared structures serve both electrical and thermal functions simultaneously.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements multi-functional structures where certain components serve both electrical and thermal purposes. For example, some vias function as both electrical interconnects and thermal conduction paths, and the substrate serves both as the mechanical platform and as a thermal management structure. This universality improves heat dissipation efficiency while minimizing the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Temperature

If thermal interface material is used to connect bridge to substrate, then thermal conductivity improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improvethermal conductivityVSAvoidassembly alignment precision
Core Design Contradiction:
TemperatureVSManufacturing precision

Solution Approach 1:

The patent addresses manufacturing precision challenges by carefully selecting and optimizing the thermal interface material parameters, particularly its viscosity and reflow characteristics. By controlling these material parameters, the patent enables self-alignment during the reflow process, which compensates for minor misalignments and reduces the stringency of manufacturing precision requirements while achieving good thermal contact.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively reduces chip temperatures by creating additional heat conduction paths that bypass the chips, allowing for more efficient heat dissipation and preventing circuit failure.

Implementation Method 1

The bridge is thermally connected with a thermal interface material (TIM) to an underlying laminated substrate for the chips

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

A laminated substrate of the package has metal lines and vias embedded in dielectric layers. In addition to metal lines and vias required for electrical connectivity, additional horizontal metal lines and vertical vias are purposely included to thermally connect to the bridge and conduct heat to a lid

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 3

The lid is attached to the laminate top surface with an adhesive

Methodology Applied
Scientific EffectConvection: Convection

Implementation Method 4

The lid is in thermal contact with the chips through a thermal interface material

Methodology Applied
Scientific EffectThermal radiation: Thermal Radiation

Data Source

PatentUS11101191B2Laminated circuitry cooling for inter-chip bridges
Publication Date: 2021.08.24 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11101191B2 patent drawing
  • US11101191B2 patent drawing
  • US11101191B2 patent drawing

AI summary

The present invention includes embodiments of a semiconductor package designed to transfer heat from one or more bridges within the package to ambient external to the package in addition to conducting the heat through any semiconductor chips encapsulated within the package. A laminated substrate has one or more horizontal layer heat conduction paths and one or more vertical substrate heat conduction paths. The vertical substrate heat conduction paths collect heat from one or more of the horizontal layer heat conduction paths, and eventually conduct the heat out of the semiconductor package, e.g. into a lid or heat sink.