Laminated Terminal Structure for Low-Inductance Power Modules
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Solution Overview
Problem
Existing power semiconductor modules face challenges in reducing switching losses and preventing overvoltage during high-speed switching, with current methods failing to effectively minimize wiring parasitic inductance and causing potential damage due to voids and partial discharges in the lamination process.
Innovation Solution
A semiconductor device with a laminated wiring structure using an insulated circuit substrate, power semiconductor elements, and a conductive film on an insulating sheet between plate-like terminals, which reduces wiring parasitic inductance and prevents partial discharges by maintaining a consistent distance and avoiding adhesive defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If terminals are bonded by use of adhesive, then terminals can be connected, but bubbles remain as voids after solidification causing partial discharge
Solution Approach 1:
The patent extracts the adhesive material from the bonding process and replaces it with a mechanical pressing structure. The pressing member applies pressure to bond terminals directly to the insulating sheet without adhesive, eliminating the source of voids and partial discharge while maintaining connection reliability.
Solution Approach 2:
The patent introduces a pressing member as an intermediary between the terminals and the insulating sheet. This pressing member transfers and distributes pressure uniformly across the bonding interface, enabling adhesive-free bonding while preventing void formation that would lead to partial discharge.
2Loss of energy
If distance between terminals is reduced to minimize inductance, then switching loss is reduced, but insulation breakdown occurs due to electrical discharge
Solution Approach 1:
The patent applies local quality by creating a pressing member with varying pressure distribution - higher pressure at critical insulation regions and appropriate pressure at terminal bonding regions. This localized pressure optimization maintains insulation integrity even at reduced terminal distances, preventing electrical discharge while minimizing inductance.
Solution Approach 2:
The patent changes the pressure parameter applied during bonding to achieve optimal results. By controlling and optimizing the pressure distribution through the pressing member, the patent enables reduced terminal spacing for lower inductance while maintaining sufficient insulation pressure to prevent breakdown and electrical discharge.
3Manufacturing precision
If terminals are subjected to bending processing with high accuracy, then lamination wiring is achieved, but manufacturing cost increases
Solution Approach 1:
The patent segments the bonding process into two independent stages: first, rough positioning of terminals with relaxed tolerance; second, precision positioning through the pressing member that applies localized pressure to achieve accurate alignment. This segmentation eliminates the need for high-precision bending processing while maintaining terminal positioning accuracy.
Solution Approach 2:
The patent performs preliminary positioning of terminals before the final pressing operation. Terminals are preliminarily arranged in approximate positions, and then the pressing member is introduced to achieve precise positioning and bonding. This preliminary action approach reduces manufacturing complexity and cost compared to requiring high-precision bending from the start.
Data Source
AI summary
A semiconductor device includes: an insulated circuit substrate; a power semiconductor element mounted on the insulated circuit substrate; a first terminal having a plate-like shape having a first main surface and electrically connected to the power semiconductor element; a second terminal having a second main surface opposed to the first main surface of the first terminal and electrically connected to the power semiconductor element; an insulating sheet interposed between the first main surface and the second main surface; and a conductive film provided on at least one of the first main surface side and the second main surface side of the insulating sheet.