Laminated Wiring Substrate for Fine-Pitch Via Alignment
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Solution Overview
Problem
Existing wiring substrates face challenges in achieving high-quality, high-density wiring designs with fine pitch and aspect ratios, often resulting in misalignment and uneven surfaces during via conductor formation, which can affect electrical signal transmission and manufacturing yield.
Innovation Solution
A wiring substrate with a laminated structure comprising a first build-up part with fine wirings and dense circuitry, and a second build-up part with coarser wirings, where the first build-up part includes conductor layers with wiring widths and inter-wiring distances of 3 μm or less, and an aspect ratio of 2.0 to 4.0, and via conductors are formed using a two-layer structure with polished surfaces to ensure high flatness and connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If fine pitch and high-density wiring design is implemented, then wiring density increases, but misalignment and manufacturing defects occur
Solution Approach 1:
The wiring substrate is divided into multiple build-up parts with different wiring densities. The first build-up part contains fine-pitch high-density wirings, while the second build-up part contains coarser wirings. This segmentation allows each region to be optimized independently, enabling high overall wiring density while maintaining manufacturability in each segment.
Solution Approach 2:
Different regions of the wiring substrate have different wiring specifications. The first build-up part has wiring widths and inter-wiring distances of 3 μm or less with aspect ratios of 2.0 to 4.0, while the second build-up part has larger dimensions. This local quality variation allows high-density areas to achieve maximum wiring density while coarser areas ensure manufacturing precision and alignment accuracy.
2Reliability
If via conductors are formed in fine-pitch wirings, then wiring connectivity improves, but misalignment and surface unevenness increase
Solution Approach 1:
The aspect ratio of wirings in the first build-up part is controlled within a specific range of 2.0 to 4.0. This parameter optimization ensures that via conductors can be formed with adequate clearance and alignment tolerance, improving electrical connectivity while maintaining via formation precision and surface flatness.
3Adaptability or versatility
If wiring width and inter-wiring distance are reduced to 3 μm or less, then circuit design flexibility increases, but manufacturing difficulty increases
Solution Approach 1:
The substrate is segmented into a first build-up part with fine wirings (3 μm or less) for high design flexibility applications, and a second build-up part with coarser wirings for easier manufacturing. This segmentation enables the overall design to achieve high flexibility while maintaining ease of manufacture in critical areas.
Solution Approach 2:
Fine-pitch wirings with widths and inter-wiring distances of 3 μm or less are localized to the first build-up part where high design flexibility is required. The second build-up part uses coarser wirings that are easier to manufacture. This local quality differentiation achieves circuit design flexibility where needed while maintaining ease of manufacture overall.
Data Source
AI summary
A wiring substrate includes a first build-up part includes first insulating layers, first conductor layers and first via conductors, and a second build-up part laminated to the first build-up part and including second insulating layers, second conductor layers and second via conductors. The first conductor layers in the first build-up part and the second conductor layers in the second build-up part include wirings such that a wiring width and an inter-wiring distance of the wirings in the first conductor layers are smaller than a wiring width and an inter-wiring distance of the wirings in the second conductor layers, an aspect ratio of the wirings in the first conductor layers is in the range of 2.0 to 4.0, the wiring width of the wirings in the first conductor layers is 3 μm or less, and the inter-wiring distance of the wirings in the first conductor layers is 3 μm or less.