Lane-Specific CRC and Checksum for Multi-Lane Error Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing data validation techniques, such as CRC and checksum, face challenges in efficiently detecting error bursts across multiple lanes while requiring significant hardware resources and bandwidth, especially when larger sizes are needed for better error detection.
Innovation Solution
A method that performs CRC using a selected polynomial based on the number of lanes, word size, and frame size, combined with checksum validation, to optimize error detection within hardware limitations, using a combination of CRC and checksum bits allocated strategically for enhanced error detection efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a larger size CRC is used to increase the likelihood of detecting larger error bursts, then error detection capability is improved, but hardware resources and transmission bandwidth increase
Solution Approach 1:
The patent segments the error detection function into two parts: a smaller CRC (e.g., CRC-6 or CRC-8) for detecting small error bursts, and a checksum for detecting larger error bursts. This segmentation allows the system to achieve comprehensive error detection coverage without requiring a single large CRC that would consume excessive hardware resources. The CRC handles errors within a certain radius while the checksum handles larger error bursts, dividing the detection workload efficiently.
Solution Approach 2:
Instead of using a full-size CRC (e.g., CRC-32) that provides complete error detection coverage but consumes excessive resources, the patent applies partial action by using a reduced-size CRC (CRC-6 or CRC-8) that handles the most common small error bursts. The checksum then supplements this by detecting larger error bursts that the smaller CRC might miss. This partial approach to each validation method achieves overall comprehensive coverage with reduced total resource consumption.
2Reliability
If a larger size CRC is used to increase the likelihood of detecting larger error bursts, then error detection capability is improved, but transmission bandwidth increases
Solution Approach 1:
The validation bits are segmented into two components: a smaller CRC field (6-8 bits) and a checksum field. This segmentation reduces the total number of validation bits transmitted compared to using a single large CRC, thereby reducing bandwidth consumption while maintaining comprehensive error detection capability through the combined action of both validation mechanisms.
Solution Approach 2:
The patent changes the parameters of the error detection system by selecting specific small CRC sizes (CRC-6 or CRC-8) and combining them with checksum validation. This parameter change from a single large CRC to a hybrid approach reduces the total validation bit length while maintaining or improving error detection effectiveness, thus reducing transmission bandwidth requirements.
3Reliability
If different CRC polynomials are used for different lane configurations, then error detection effectiveness is improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by selecting specific CRC polynomials tailored to specific lane configurations (e.g., P6 for certain lane setups, P8 for others). Each polynomial is optimized for its designated lane configuration, providing locally optimal error detection effectiveness. The system includes logic to identify the lane configuration and select the appropriate polynomial, ensuring each configuration gets its optimized polynomial without requiring all possible polynomials to be implemented simultaneously.
Data Source
AI summary
A method of data validation is provided. In one implementation, the method includes performing a cyclic redundancy check (CRC) on data transmitted over a channel having L lanes. In one implementation, the performing includes performing the CRC using n CRC bits and a CRC polynomial, where n is an integer equal to or greater than one and where L is an integer equal to or greater than one and represents the number of lanes in the channel. Further, in one implementation, the CRC polynomial is selected based on L. In one implementation, the method includes: performing a CRC on data, where the performing includes performing the CRC using n CRC bits, where n is an integer equal to or greater than one; and performing a checksum on the data, where the performing the checksum includes performing the checksum using m checksum bits, where m is an integer equal to or greater than one, where n plus m bits are allocated for validating the data. In one implementation, the performing the CRC and the performing the checksum are implemented by a hardware device.