Semiconductor Laser Annealing With Bidirectional Wafer Scanning
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Solution Overview
Problem
Laser annealing in semiconductor fabrication can create optical intensity oscillations and residual temperature gradients, leading to dopant activation variance and undesirable resistance variations in integrated circuits, particularly affecting analog circuits and components with high accuracy requirements.
Innovation Solution
A method of laser annealing that involves tracing laser beams in alternating directions across a semiconductor wafer, using multiple scan sets with scan lines in colinear but opposite directions to achieve uniform heat distribution and consistent dopant activation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If laser annealing is performed on semiconductor wafer, then dopant activation and junction formation are achieved, but optical intensity oscillations and residual temperature gradients are created causing dopant activation variance
Solution Approach 1:
The patent applies bidirectional scanning where the laser beam traverses the wafer in opposite directions (forward and reverse passes) to compensate for unidirectional heat accumulation patterns. This inversion approach counteracts the residual temperature gradients that cause dopant activation variance, achieving more uniform heating across the wafer surface.
Solution Approach 2:
The patent employs multiple scan sets with periodic forward and reverse passes over the wafer. By repeating the scanning process in alternating directions across different scan sets, the system distributes thermal energy more evenly and eliminates localized hot spots that would otherwise cause resistance variations in circuit components.
2Temperature
If laser beam scans across semiconductor wafer, then annealing treatment is applied, but heat distribution uniformity deteriorates due to scanning direction effects
Solution Approach 1:
The patent implements bidirectional scanning where laser beams traverse the wafer in opposite directions across different scan sets. This inversion of scanning direction compensates for directional heat accumulation effects, ensuring more uniform temperature distribution and consistent dopant activation across the entire wafer surface.
Solution Approach 2:
The patent modifies the scanning parameters by introducing multiple scan sets with varying directions (forward and reverse passes). By changing the scanning direction parameter across different passes, the system achieves more uniform heat distribution and eliminates temperature gradients that would affect dopant activation consistency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances uniformity of heat and dopant activation across the wafer, improving the consistency and performance of integrated circuits by reducing resistance variations and ensuring uniformity of critical circuit components.
Implementation Method 1
laser annealing, sometimes referred to as laser spike annealing (LSA), typically activates CMOS dopants
Implementation Method 2
tracing a first laser beam, in a first path having a first direction, across the at least a portion of the semiconductor wafer
Implementation Method 3
The optical intensity oscillation will eventually stabilize through heat diffusion, but thereafter a residual temperature gradient is created
Data Source
AI summary
A method of forming an integrated circuit is described. The method first positions a semiconductor wafer in a processing chamber, and second, laser anneals at least a portion of the semiconductor wafer. The laser annealing includes tracing a first laser beam, in a first path having a first direction, across the at least a portion of the semiconductor wafer, tracing a second laser beam, in a second path having a second direction, opposite to and colinear with the first direction, across the at least a portion of the semiconductor wafer.