Laser Crystallization of Amorphous Semiconductor for Active Patterns
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Solution Overview
Problem
Current methods for forming active patterns in display devices, such as those using lithography and etching processes, are complex and costly, while direct catalyst development methods struggle to produce high-quality patterns in desired areas.
Innovation Solution
A method involving the formation of a gate metal layer, patterning, and laser crystallization of an amorphous semiconductor layer to create a nano-wire active pattern, simplifying the manufacturing process and allowing for high-quality pattern formation in desired areas with adjustable channel width and length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If lithography and etching processes are used to form the active pattern, then the channel can be formed relatively uniformly in a desired area, but the process becomes complicated and expensive facilities are required
Solution Approach 1:
The patent extracts and removes the complex lithography and etching steps from the manufacturing process. Instead of using these complicated processes, the invention directly forms the active pattern through a simplified method that deposits a semiconductor layer and selectively removes material, achieving uniform channel formation without the need for expensive lithography and etching facilities
Solution Approach 2:
The patent replaces the mechanical lithography and etching system with a different approach. Instead of using photolithography masks and chemical etching, the invention uses direct deposition and selective removal methods, substituting the complex mechanical-optical system with a simpler physical chemistry-based process
2Ease of manufacture
If direct catalyst development method is used to form the active pattern, then the manufacturing cost is reduced, but it becomes difficult to form a high quality active pattern in a desired area
Solution Approach 1:
The patent applies local quality by creating different properties in different areas of the semiconductor layer. By selectively removing the semiconductor layer in specific regions while maintaining it in others, the invention achieves high-quality active patterns in desired areas. This localized treatment allows the channel region to have the appropriate semiconductor material while other areas are removed, solving the problem of forming high-quality patterns only where needed
Solution Approach 2:
The patent uses preliminary action by first depositing the semiconductor layer uniformly across the entire substrate before selectively removing portions of it. This preliminary deposition ensures that the semiconductor material is available throughout the area, and then selective removal creates the precise active pattern. This approach allows cost-effective manufacturing while maintaining high pattern quality in the desired regions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces costs, and enables the formation of high-quality active patterns in display substrates using a four-mask process, while allowing for precise adjustment of channel dimensions.
Implementation Method 1
illuminating a laser on the amorphous semiconductor layer on the second protruded boundary surface to crystallize the amorphous semiconductor layer
Data Source
AI summary
In a method of forming an active pattern, a gate metal layer is formed on a base substrate. The gate metal layer is patterned to form a gate line, and a gate pattern spaced apart from the gate line. A gate insulation layer is formed on the base substrate including the gate line and the gate pattern thereon, to form a first protruded boundary surface corresponding to an area including the gate pattern. An amorphous semiconductor layer is formed on the base substrate including the gate insulation layer thereon, to form a second protruded boundary surface corresponding to the first protruded boundary surface. The amorphous semiconductor layer is crystallized by illuminating a laser to the amorphous semiconductor layer on the second protruded boundary surface.


