Laser Diode Driver Shunt Mode Complementary Signals
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Solution Overview
Problem
Existing laser drivers with shunt mode require a positive DC bias and large terminating capacitors, leading to increased power consumption and degraded high-frequency performance due to parasitic inductance from bonding wires, making it difficult to integrate large capacitors within ICs.
Innovation Solution
A laser driver design using two transistors of different sizes connected in parallel with a terminator between their control electrodes and a compensating capacitor to handle differential signals, eliminating the need for large capacitors and reducing power consumption by terminating signals between input terminals rather than to ground.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a large terminating capacitor is used to isolate the input terminal in DC mode, then power consumption is reduced, but the capacitor cannot be integrated within the IC and requires external placement with bonding wires, which degrades high frequency response
Solution Approach 1:
The patent changes the termination architecture from a single large capacitor connected to ground to two smaller capacitors distributed between differential input terminals. This dimensional redistribution allows the termination function to be achieved with smaller, integrable capacitors while maintaining the same power consumption benefits and improving high-frequency response by eliminating bonding wire parasitics.
2Reliability
If the terminator is connected to ground to reduce signal reflection, then signal integrity is improved, but DC offset voltage causes excessive DC current flow and increased power consumption
Solution Approach 1:
Instead of connecting the terminator to ground as in conventional designs, the patent inverts the termination approach by connecting it between the two differential input terminals. This inversion allows the terminator to maintain signal integrity by reducing reflections while avoiding the DC current path to ground, thereby eliminating the excessive power consumption caused by DC offset voltage.
3Device complexity
If a single transistor is used in shunt mode, then the circuit is simple, but a positive DC bias is required which increases power consumption when connected to ground through terminator
Solution Approach 1:
The patent segments the single transistor shunt configuration into two transistors operating in a differential pair arrangement. This segmentation allows each transistor to handle one phase of the differential signal, enabling the use of smaller terminators between the differential inputs and eliminating the need for large DC bias currents to ground, thereby reducing power consumption while maintaining circuit functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design secures high-frequency performance while minimizing power consumption and reducing electromagnetic interference noise by integrating the capacitor within the IC, eliminating the need for external capacitors and bonding wires.
Implementation Method 1
The terminator is connected between control electrodes of the transistor to terminate the complementary signals
Implementation Method 2
The capacitance of this capacitor may be equivalent to a difference in the junction capacitance of two transistors. Thus, the laser driver with the capacitor may compensate an unbalance in the inputs thereof
Implementation Method 3
The laser driver may shunt the bias current supplied from the current source through an inductor to the LD in accordance with the differential signal applied thereto
Data Source
AI summary
A laser driver to drive an LD in the shunt mode and driven with signals complementary to each other is disclosed. The driver includes two FETs of the enhancement and a terminator. Two FETs are connected in parallel with the LD and driven by the complementary signals but have sizes different from each other. The terminator is connected between respective gate terminals of the FET. The driver further includes a capacitor that compensates the difference in the size of two FETs, which is substantially equal to a magnitude of the junction capacitance of the FET. The capacitor is integrated with the FETs.