Laser Detection Latch Circuit With Series MOSFETs for Chip Security
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Solution Overview
Problem
Existing laser detecting circuits face challenges in achieving high sensitivity while maintaining a small size, which is crucial for enhancing chip security against physical attacks.
Innovation Solution
The proposed laser detecting circuit incorporates a latch circuit with a first and second inverter, where the second inverter includes a series connection of PMOS transistors and a series stack structure of NMOS transistors, along with dummy transistors to enhance sensitivity and compactness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the circuit size is reduced to meet miniaturization requirements, then the chip area is reduced, but the laser detection sensitivity deteriorates
Solution Approach 1:
The inverter circuit is segmented into multiple PMOS transistors connected in series, where each transistor contributes to the overall detection sensitivity. This segmentation allows the circuit to maintain high sensitivity while occupying a compact area, as the series connection enables efficient use of space compared to parallel arrangements.
Solution Approach 2:
The patent transitions from a conventional single-transistor or parallel-transistor configuration to a series connection of multiple PMOS transistors, effectively changing the dimensional arrangement of the circuit elements. This dimensional reorganization allows the circuit to achieve both compact area and high detection sensitivity by utilizing the series topology's space efficiency.
2Measurement precision
If the number of transistors is increased to improve detection sensitivity, then the sensitivity is improved, but the device complexity increases
Solution Approach 1:
Multiple PMOS transistors are merged into a single series-connected functional unit that operates collectively as one detection element. This merging approach allows the circuit to achieve enhanced sensitivity through the combined effect of multiple transistors while maintaining simplicity in the overall circuit architecture, as the series connection eliminates the need for complex control logic or additional circuitry.
Solution Approach 2:
The series-connected PMOS transistors serve multiple functions simultaneously: they act as the primary detection elements for laser sensitivity, provide signal amplification, and enable compact circuit integration. This multi-functionality reduces the need for separate dedicated components, thereby lowering overall device complexity while maintaining high detection sensitivity.
3Ease of manufacture
If conventional inverter structures are used, then the circuit design is simple, but the laser detection sensitivity is insufficient
Solution Approach 1:
The patent changes the critical parameter of transistor connection topology from parallel or single-transistor configurations to series connections. This parameter change fundamentally alters the circuit's detection capability, enabling high sensitivity while maintaining design simplicity. The series connection modifies the electrical parameters such that the cumulative effect of multiple transistors enhances sensitivity without requiring complex design methodologies.
Data Source
AI summary
A laser detecting circuit is provided. The laser detecting circuit includes a latch circuit with a first inverter configured to invert a first output signal at a first node to generate a second output signal at a second node, and a second inverter configured to generate the first output signal based on the second output signal. The second inverter includes a plurality of PMOS transistors connected in series between a first source voltage and the first node, and a plurality of NMOS transistors. A gate of each of the plurality of PMOS transistors is connected to the second node, and a drain of each of the plurality of NMOS transistors is connected to the first node. The plurality of NMOS transistors includes dummy NMOS transistors and normal NMOS transistors.