Laser Lattice Shaping for Semiconductor Die Distortion Correction
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Solution Overview
Problem
Existing 2D semiconductor fabrication techniques face challenges in scaling beyond single digit nanometer nodes, and 3D integration of transistors is needed to increase transistor density, but precise alignment and bonding of stacked semiconductor devices are hindered by distortion issues.
Innovation Solution
A method and apparatus using a focused light beam, such as a laser, to implant a lattice configuration signature into semiconductor substrates, correcting distortion by adjusting laser power, pulse duration, and pulse number to adapt die dimensions through ultrafast melting and lattice manipulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If 2D scaling is continued to increase transistor density, then more transistors can be integrated onto the substrate, but manufacturing precision deteriorates at single digit nanometer nodes
Solution Approach 1:
The patent transitions from 2D planar transistor arrangement to 3D stacked transistor configuration. Multiple transistor layers are vertically stacked on the substrate, enabling continued transistor density scaling while maintaining manufacturable feature sizes in each layer. This dimensional transition resolves the scaling wall at single digit nanometer nodes.
2Quantity of substance
If 3D transistor stacking is implemented to increase density, then transistor density improves, but alignment precision deteriorates due to substrate distortion
Solution Approach 1:
Distortion compensation data is pre-calculated and stored in a lookup table based on measured substrate distortion characteristics. Before 3D stacking alignment, the appropriate compensation data is retrieved and applied to adjust alignment marks and positioning, proactively correcting for anticipated distortion rather than reacting to it during alignment.
Solution Approach 2:
The system measures actual substrate distortion using alignment marks and overlay marks, then uses this measured distortion information to adjust subsequent alignment operations. This closed-loop feedback ensures that alignment precision is maintained despite substrate distortion by continuously adapting to actual distortion conditions.
3Reliability
If substrate distortion is present during bonding, then bonding process becomes more difficult, but manufacturing complexity increases with distortion correction processes
Solution Approach 1:
Distortion measurements and compensation data are collected and prepared in advance before the bonding process. Alignment marks are pre-positioned and distortion correction parameters are pre-calculated, so that during bonding, the system can directly apply corrections without real-time complex calculations, reducing bonding process complexity.
Solution Approach 2:
Alignment marks and reference grids serve as intermediaries between the distorted substrate and the bonding process. These markers enable measurement and communication of distortion without requiring direct measurement of bonding interfaces, simplifying the bonding process by providing a reference framework that accounts for substrate distortion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables precise correction of semiconductor substrate distortions, facilitating high-density 3D integration with improved alignment and bonding of stacked semiconductor devices, enhancing transistor density and performance.
Implementation Method 1
The laser can be tuned to a material and a lattice of the semiconductor substrate and an interface below the semiconductor substrate
Implementation Method 2
adjusting laser power, pulse duration, and pulse number to adapt die dimensions through ultrafast melting and lattice manipulation
Data Source
AI summary
Aspects of the present disclosure provide a method for correcting distortion of a semiconductor substrate. For example, the method can include receiving a semiconductor substrate with distortion, measuring the semiconductor substrate to identify the distortion in a plurality of positions on the semiconductor substrate, and implanting into the semiconductor substrate a lattice configuration signature according to the identified distortion in the positions such that the identified distortion of the semiconductor substrate is corrected.