Lasered Back-Side Features for Thinned Semiconductor Wafer Flatness
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Solution Overview
Problem
Thinned semiconductor components face issues such as bowing due to stress from circuitry, reduced defect sites leading to contaminant trapping, and difficulties in applying gettering layers due to high temperature requirements, which affect electrical characteristics and functionality.
Innovation Solution
Back side laser processing is used to form lasered features on thinned semiconductor wafers, which counteract bowing, create defect sites for contaminant trapping, and enable the formation of gettering layers without high temperature exposure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the wafer is thinned to reduce thickness, then the component thickness is reduced, but the wafer bows due to stresses from circuitry
Solution Approach 1:
The patent applies preliminary anti-action by forming counter-stress features on the back side of the thinned wafer before final processing. These features (such as recesses, protrusions, or deposited layers) are specifically designed to generate mechanical stress that opposes and counteracts the bowing tendency caused by circuitry stresses on the front side, thereby maintaining wafer flatness despite thinning
Solution Approach 2:
The patent implements local quality by creating non-uniform features at specific locations on the back side of the wafer rather than applying a uniform treatment across the entire surface. These localized features (recesses, protrusions, or selective deposition areas) are positioned to generate counter-stress precisely where needed to balance the circuitry-induced stresses and maintain overall wafer flatness
2Object-affected harmful factors
If the back side is polished to create a smooth surface, then defect sites are reduced, but contaminant trapping and carrier generation increase
Solution Approach 1:
The patent applies porous materials by creating a controlled porous or textured layer on the back side of the semiconductor wafer. This porous structure provides numerous defect sites that act as gettering centers to attract and trap contaminants, preventing them from reaching active regions. The porous layer is designed with appropriate porosity and surface area to effectively capture contaminants while maintaining electrical isolation and not adversely affecting carrier lifetime in the active regions
Solution Approach 2:
The patent uses an intermediary approach by introducing a dedicated back side layer (such as a porous silicon layer, deposited film, or textured region) that serves as a mediator between the external environment and the active semiconductor regions. This intermediary layer absorbs and traps contaminants, preventing them from directly interacting with the active regions, thereby protecting carrier lifetime while providing a controlled surface for contaminant management
3Reliability
If a gettering layer is deposited on the back side, then contaminant trapping is improved, but high temperature processing damages the circuitry
Solution Approach 1:
The patent applies segmentation by separating the gettering function from the circuitry regions through spatial division. The gettering layer is formed exclusively on the back side of the wafer, while the circuitry remains on the front side. This spatial separation allows the gettering layer to be processed at high temperatures without exposing the temperature-sensitive circuitry to damaging conditions, as the laser processing or high temperature treatment is applied only to the back side region
Solution Approach 2:
The patent implements preliminary action by forming the gettering layer on the back side before any high temperature processing steps. The gettering layer is prepared in advance on the back side, and subsequent high temperature processing (such as laser annealing or diffusion) is applied only to activate or enhance the gettering properties of this pre-formed layer, without requiring high temperature exposure of the front side circuitry
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The lasered features reduce bowing, enhance heat dissipation, improve adhesion, and facilitate contaminant trapping, while allowing for the creation of gettering layers that improve the functionality and electrical characteristics of thinned semiconductor components.
Implementation Method 1
Back side laser processing is used to form lasered features on thinned semiconductor wafers
Implementation Method 2
the lasered features reduce bowing
Data Source
AI summary
A method for fabricating semiconductor components includes the steps of providing a semiconductor substrate having a circuit side, a back side and integrated circuits and circuitry on the circuit side; thinning the substrate from the back side to a selected thickness to form a thinned substrate; applying a dopant to the back side of the thinned substrate; and laser processing the back side of the thinned substrate to form a plurality of patterns of lasered features containing the dopant. The dopant can be selected to modify properties of the semiconductor substrate such as carrier properties, gettering properties, mechanical properties or visual properties.