Latch Amplification Circuit With Pulsed Noise Suppression
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Solution Overview
Problem
Semiconductor apparatuses often malfunction due to noise signals being misinterpreted as actual signals, leading to errors in signal processing.
Innovation Solution
Incorporating a pulse generation circuit and an amplification circuit that generate and manage pulse signals in response to a clock, enabling signal amplification during specific periods and maintaining output signal levels even when the pulse signal is disabled, thereby reducing noise interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the amplification circuit continuously amplifies input signals, then signal processing capability is improved, but noise signals are also amplified causing malfunctions
Solution Approach 1:
The amplification circuit operates in periodic cycles with distinct amplification periods and holding periods. During amplification periods, the circuit actively amplifies voltage level differences between latch input nodes. During holding periods, the circuit maintains the amplified output levels without further amplification. This periodic operation allows the system to process signals effectively while preventing continuous noise amplification that would cause malfunctions.
Solution Approach 2:
The circuit performs voltage level difference amplification in advance during the amplification period, before noise accumulation becomes problematic. The amplified voltage levels are then maintained during the holding period, ensuring that valid signal processing is completed before potential noise interference occurs. This preliminary action approach ensures signal accuracy while maintaining productivity.
2Duration of action of moving object
If the pulse signal enable period is extended, then more signal processing time is available, but the clock high period may be insufficient
Solution Approach 1:
The pulse signal is designed with a specific enable period that is shorter than the clock high period, creating a periodic pattern where amplification occurs only during enabled intervals. This periodic structure ensures that the amplification circuit has sufficient time to process signals during enable periods while the clock maintains its high state for the complete required duration, preventing time loss for subsequent operations.
Data Source
AI summary
A semiconductor apparatus includes a pulse generation circuit which generates a pulse signal in response to a clock, and an amplification circuit which generates an output signal in response to an input signal, the clock, and the pulse signal, wherein the amplification circuit voltage is configured to amplify a voltage level difference between a pair of latch input nodes.


