Latch Circuit Topology to Prevent Storage-Node Charge Sharing
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Solution Overview
Problem
In highly integrated semiconductor circuits, the miniaturization of storage nodes in latch circuits leads to decreased capacitance, making them susceptible to soft errors and voltage fluctuations, which can cause data inversion and instability, especially due to charge sharing between storage nodes and capacitor elements.
Innovation Solution
A latch circuit design incorporating cross-connected inverter circuits, a tristate inverter circuit, and a MOS transistor switch or transfer gate to control the connection of a capacitor element to the storage node, ensuring stable data retention by increasing capacitance without charge sharing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the capacitance of the storage node is increased by connecting a capacitor element directly to the storage node, then resistance to soft error and voltage fluctuation is improved, but charge sharing occurs between the storage node and capacitor element when logic values differ, causing data inversion
Solution Approach 1:
A switching element is introduced as an intermediary between the storage node and the capacitor element. This switching element controls when the capacitor element is connected to the storage node, preventing unauthorized charge sharing while allowing beneficial capacitance increase during normal operation. The intermediary switches based on control signals to ensure data integrity.
Solution Approach 2:
The connection between the storage node and capacitor element is made dynamic rather than static. The switching element changes the connection state based on operational conditions, being connected during normal data holding to provide stability, and disconnected when logic values differ to prevent charge sharing. This dynamic control resolves the contradiction between needing high capacitance and preventing harmful charge sharing.
2Use of energy by moving object
If the drive voltage is reduced to decrease power consumption when the circuit is not operated, then power consumption is improved, but the number of electric charges accumulated in the storage node decreases, making data susceptible to inversion by power supply noise
Solution Approach 1:
The capacitor element is pre-charged to the same logic value as the storage node before being connected. This preliminary action ensures that when the switching element connects the capacitor element to the storage node, no charge sharing occurs because both nodes already have the same voltage level. This allows the system to maintain data stability even when drive voltage is reduced for power saving.
Solution Approach 2:
The switching element acts as a mediator that controls the timing and condition of connection between the storage node and capacitor element. It ensures the capacitor element is only connected when it holds the same logic value, preventing charge sharing even during low-voltage operation. This intermediary control enables power reduction without compromising data stability.
3Productivity
If multiple storage nodes are closely arranged to increase degree of integration, then productivity and integration are improved, but the plurality of storage nodes are exposed to radiation to invert data even with local irradiation range, and normal data recovery becomes difficult
Solution Approach 1:
The switching element serves as a protective intermediary that isolates the storage node from the capacitor element when logic values differ. This isolation prevents radiation-induced charge sharing from causing data inversion, even when storage nodes are closely arranged for high integration. The intermediary ensures that local radiation effects do not propagate to corrupt adjacent data.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively stabilizes data holding in latch circuits by increasing capacitance and preventing charge sharing, enhancing resistance to soft errors and noise-induced data inversion, thereby improving the reliability and stability of semiconductor integrated circuits.
Implementation Method 1
a capacitor element connected between an output terminal of the third inverter circuit and a reference voltage node. According to this, the capacitor element is connected to the output terminal of the second inverter circuit serving as a storage node through the switching element to increase the capacitance of the storage node.
Implementation Method 2
When the switching element is turned on, charge sharing does not occur between the output terminal of the second inverter circuit and the capacitor element.
Data Source
AI summary
A latch circuit includes first, second, and third inverter circuits, a switching element, and a capacitor element. The first inverter circuit and the second inverter circuit are cross-connected to each other. The third inverter circuit logically inverts an output from the first inverter circuit. The switching element is connected between the output terminal of the second inverter circuit and the output terminal of the third inverter circuit. The capacitor element is connected between the output terminal of the third inverter circuit and a reference voltage node.