Multi-Phase Latch FIR Filter for Lower Power and Shoot-Through Control
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Solution Overview
Problem
Conventional FIR filters have high power consumption due to the use of flip flops, which contributes significantly to device power consumption.
Innovation Solution
A latch-based FIR filter design is implemented using a combination of latches and flip flops, where the data path is aligned with multiple clock phases to input data to computation stages, and flip flops are sparingly inserted to mitigate shoot-through issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If flip flops are used in FIR filter design, then reliability is improved, but power consumption increases
Solution Approach 1:
The filter is divided into multiple pipelines, each handling a portion of the filtering operation. This segmentation allows parallel processing while using fewer flip flops per pipeline, reducing overall power consumption while maintaining reliability through distributed operation
Solution Approach 2:
The patent employs dynamic clock gating techniques where clock signals are selectively enabled or disabled based on operational needs. This dynamic approach allows the filter to maintain reliability when needed while reducing power consumption during idle or low-activity periods
2Measurement precision
If more memory components are used in FIR filter, then filtering precision is improved, but device area increases
Solution Approach 1:
The patent transitions from a single-pipeline architecture to a multi-pipeline architecture, adding a temporal dimension to the processing. By distributing memory usage across multiple pipelines that operate in parallel, the system achieves high filtering precision without concentrating all memory requirements in a single location, thus reducing peak area requirements
Solution Approach 2:
The patent implements a sliding window approach where old data is discarded and new data is continuously fed into the filter. This allows the use of smaller, reusable memory buffers that are continuously updated, achieving high filtering precision without requiring large static memory arrays
3Use of energy by moving object
If latches are used instead of flip flops, then power consumption is reduced, but shoot-through issues occur
Solution Approach 1:
The patent introduces clock gating signals as intermediaries between the latches and the data path. These gating signals control when latches are transparent or opaque, preventing shoot-through by ensuring that data is only passed when the clock signal is in the appropriate state, thus maintaining signal integrity while using low-power latches
Data Source
AI summary
Provided is a filter that includes a plurality of filter stages that are serially coupled. Each filter stage of the plurality of filter stages includes a plurality of latches. The plurality of latches are respectively driven by a plurality of clock signals. The plurality of clock signals are different from each other. Each filter stage includes a flip flop coupled to a last latch of the plurality of latches. The flip flop and the last latch are driven by a first clock signal of the plurality of clock signals.