Latch-up Free Power Transistor Structure

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Solution Overview

Problem

Insulated-gate bipolar transistors (IGBTs) are susceptible to latch-up, a condition that prevents the insulated gate from controlling current or turning the IGBT off, leading to malfunction and potential destruction due to the parasitic NPN bipolar junction transistor in their vertical structure.

Innovation Solution

The implementation of a latch-up free power transistor structure where the highly doped emitter diffusion region is omitted, replaced by an emitter electrode or emitter layer that makes direct physical contact with the conduction channel, eliminating the parasitic bipolar junction transistor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a highly doped emitter diffusion region is used in conventional IGBT structure, then good electrical contact and current injection are achieved, but parasitic bipolar junction transistor is formed causing latch-up

Engineering Contradiction:
Improvelatch-up preventionVSAvoidstructure modification
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and removes the highly doped emitter diffusion region from the conventional IGBT structure. By taking out this specific component that causes parasitic bipolar junction formation, the latch-up problem is eliminated while maintaining the essential functionality of the device through alternative emitter electrode design.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary approach by using a lightly doped emitter region combined with a metal emitter electrode instead of direct highly doped diffusion contact. This intermediary structure prevents parasitic bipolar junction formation while still achieving the necessary electrical contact and current injection functions.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If emitter electrode makes direct contact with conduction channel, then parasitic bipolar junction transistor is eliminated, but manufacturing precision requirements increase

Engineering Contradiction:
Improvelatch-up preventionVSAvoiddirect contact alignment
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming the lightly doped emitter region and positioning the emitter electrode structure before final assembly steps. This preliminary structuring establishes the correct geometric relationships and contact positions, reducing the precision demands on subsequent manufacturing operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the doping parameter of the emitter region from highly doped to lightly doped, which fundamentally alters the electrical characteristics and eliminates parasitic bipolar junction formation. This parameter change allows for more tolerant manufacturing tolerances while maintaining device functionality.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9722059B2Latch-up free power transistor
Publication Date: 2017.08.01 INFINEON TECHNOLOGIES AG
  • US9722059B2 patent drawing
  • US9722059B2 patent drawing
  • US9722059B2 patent drawing

AI summary

There are disclosed herein various implementations of a latch-up free power transistor. Such a device includes an insulated gate situated adjacent to a conduction channel in the power transistor, an emitter electrode in direct physical contact with the conduction channel, and a collector electrode in electrical contact with the conduction channel. The power transistor also includes an emitter layer in contact with a surface of a semiconductor substrate adjacent the conduction channel.