Latch-Based Level Shifter for Power-Off Signal Retention
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Solution Overview
Problem
Existing integrated circuit designs face challenges in transferring data between different voltage supply domains without losing signal state and causing crowbar current when one supply domain is powered off, as level shifter circuits often result in floating signals and undefined output.
Innovation Solution
A level-shifter circuit using a latch that maintains its output level based on the destination supply rail, even when the source supply is reduced to zero volts, ensuring the output signal represents the same state as the input signal during power transitions, and includes transistors and inverters to manage signal states across different voltage domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a level shifter circuit is used to transfer data between different voltage supply domains, then data transfer between voltage domains is enabled, but when the source supply is powered off, the output signal becomes floating and undefined, causing crowbar current to flow
Solution Approach 1:
The patent introduces a latch circuit as an intermediary element between the input and output of the level shifter. This latch holds the input signal state even when the source voltage domain is powered off, preventing the output from becoming floating. The latch acts as a buffer that decouples the input signal retention from the source supply voltage, thereby eliminating crowbar current while maintaining signal integrity across voltage domain transitions.
2Adaptability or versatility
If a level shifter circuit is used to transfer data between different voltage supply domains, then data transfer between voltage domains is enabled, but when the source supply is powered off, crowbar current flows in the destination logic circuit
Solution Approach 1:
The latch circuit serves as a mediator that prevents direct coupling between the powered-off source domain and the active destination domain. By holding the signal state internally, the latch ensures the output remains at a defined logic level (either high or low) rather than floating, thereby preventing crowbar current from flowing into the destination logic circuit while still enabling data transfer functionality.
Solution Approach 2:
The latch captures and holds the input signal state before the source supply is completely powered off. This preliminary action of storing the signal state ensures that when the source voltage drops to zero, the output already has a defined level, preventing the formation of crowbar current. The latch prepares the signal in advance to maintain stability during power transition events.
3Adaptability or versatility
If traditional level shifter circuits are used, then signal level conversion is achieved, but the circuit area and power consumption increase
Solution Approach 1:
The patent divides the level shifter functionality into two separate components: a traditional level shifter circuit for voltage level conversion and a latch circuit for signal state retention. This segmentation allows each component to be optimized independently - the level shifter handles voltage conversion while the latch handles state retention, potentially reducing overall circuit area compared to a monolithic design that attempts to perform both functions simultaneously.
Data Source
AI summary
A level-shifter circuit configured to transfer data between two voltage supply domains may eliminate crowbar current while simultaneously providing a valid output signal. The level-shifter circuit may transfer a data signal between the two voltage domains using a latch that is capable of maintaining its output level—based on the destination supply rail—to correspond to the same state to which the level of the input signal—based on the originating supply rail—corresponds, even when the originating supply is decreased to a zero-volt state, or to a voltage equivalent to a low state. During normal operation, when both power supplies are available, the signal at the output of the latch, and hence at the output of the level-shifter circuit may toggle to always track the input signal. Thus, the level of the signal at the output of the level-shifter may always represent the same state (e.g. binary value) as the level of the input signal, during normal operation and also when the originating power supply is powered down.


