Latch NBTI Toggling Control for Uniform Semiconductor Wear

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Solution Overview

Problem

Semiconductor devices in electrical systems experience uneven wear due to negative-bias temperature instability (NBTI) when operating in low-power modes, leading to performance degradation and reliability issues, as static data signals cause consistent stress, resulting in non-uniform wear and timing violations.

Innovation Solution

The implementation of asynchronous NBTI control signals that deterministically control latch operation by prioritizing the toggling of the clock pin over the data pin, using an interlocking scheme to ensure synchronized propagation of signals and prevent unexpected latch states, thereby promoting uniform wear across semiconductor devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If semiconductor devices operate in low-power modes with static data signals, then power consumption is reduced, but device wear becomes non-uniform and reliability decreases

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice wear uniformity
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies periodic action by implementing wear-leveling techniques that periodically toggle data signals through logic circuits during low-power modes. Instead of maintaining static signals indefinitely, the system periodically changes signal states to distribute wear more uniformly across semiconductor devices, thereby maintaining reliability while preserving power savings.

Inventive Principle:
Principle #19Periodic action

2Use of energy by moving object

If static data signals are applied to semiconductor devices for extended periods, then power consumption decreases, but NBTI degradation increases and performance deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidNBTI degradation
Core Design Contradiction:
Use of energy by moving objectVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by proactively managing signal toggling before severe NBTI degradation occurs. The wear-leveling system monitors and controls signal states in advance, periodically transitioning signals to prevent excessive cumulative stress on any single device path, thereby mitigating NBTI degradation before it significantly impacts performance.

Inventive Principle:
Principle #10Preliminary action

3Use of energy by moving object

If semiconductor devices remain in the same state for extended periods, then power consumption is reduced, but susceptibility to reliability issues increases

Engineering Contradiction:
Improvepower consumptionVSAvoidsusceptibility to reliability issues
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies dynamics by introducing controlled variability into signal states during low-power modes. Rather than maintaining completely static signals, the system dynamically toggles data signals through different logic circuit paths in a controlled manner, ensuring that devices experience varied stress patterns that prevent localized wear accumulation and maintain overall reliability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10447267B1Systems and methods for controlling semiconductor device wear
Publication Date: 2019.10.15 MICRON TECHNOLOGY INC
  • US10447267B1 patent drawing
  • US10447267B1 patent drawing
  • US10447267B1 patent drawing

AI summary

Systems, methods, and devices are provided for increasing uniformity of wear in semiconductor devices due to, for example, negative-bias temperature instability (NBTI). The method may include receiving a first NBTI control signal. The method may involve receiving a second NBTI control signal based at least in part on the first NBTI control signal. The method may also involve asserting the first NBTI control signal at a clock input pin of a latch. Further, the method may include asserting the second NBTI control signal at a data input pin of the latch. The method may additionally involve toggling electrical elements downstream of the latch based at least in part on an output of the latch based on the first and second NBTI control signals to increase uniformity of wear on the electrical elements in a default low-power state during NBTI toggling mode.