Latch Element Sensing with Error Correction During Memory Initialization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Memory sub-systems experience a high number of data errors during initialization due to the use of non-optimized read parameters, leading to inefficiencies and errors in data retrieval.

Innovation Solution

Implementing a sense operation with error correction that utilizes data redundancy and concurrent selection of multiple latch elements to reinforce signal output, reducing the need for decoder circuitry and minimizing operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If non-optimized read parameters are used during initialization, then device complexity is reduced, but data error rate increases significantly

Engineering Contradiction:
Improveread parameter optimization complexityVSAvoiddata error rate
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a sense operation with error correction during the initialization phase to retrieve and verify initialization parameters before normal operation begins. This preliminary error correction ensures data integrity is established before the system transitions to optimized read modes, resolving the contradiction between simplified initialization and data reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by reading multiple copies of the same data from memory cells during initialization. By retrieving multiple copies and performing error correction on them, the system can identify and correct errors without requiring complex read parameter optimization, thus maintaining low device complexity while improving reliability.

Inventive Principle:
Principle #26Copying

2Measurement precision

If multiple latch elements are concurrently selected to reinforce signal output, then sensing accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvesensing accuracyVSAvoidlatch element selection complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies merging by concurrently selecting multiple latch elements that contain the same data and combining their signal outputs through signal reinforcement. This merging of multiple signal sources improves sensing accuracy by providing redundant signal paths, while the concurrent selection mechanism keeps the implementation relatively simple compared to sequential processing approaches.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If error correction operations are performed during initialization, then data reliability is improved, but number of operations increases

Engineering Contradiction:
Improveerror-free data retrievalVSAvoidinitialization speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs error correction as a preliminary action during initialization, establishing data reliability before normal operations begin. By completing error correction during the initialization phase rather than during subsequent operations, the system ensures data integrity without impacting the speed of normal data retrieval operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent reads multiple copies of data during initialization and performs error correction on these copies. By processing multiple copies in parallel during initialization, the system can establish reliable data without requiring extensive sequential operations, thus improving reliability while minimizing the impact on initialization speed.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20260072614A1Data sensing with error correction
Publication Date: 2026.03.12 MICRON TECHNOLOGY INC
  • US20260072614A1 patent drawing
  • US20260072614A1 patent drawing
  • US20260072614A1 patent drawing

AI summary

A pulse signal is simultaneously generated on a respective select line of each of two or more latch elements of a set of latch elements using a select line signal generator. Each of the two or more latch elements store sensed copies of a stored data. An output is determined based on a sensing of a conducting line driven by the two or more latch elements responsive to the pulse signal.