Latch-Type Charge Pump Using Triple-Well Isolation

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Solution Overview

Problem

Conventional inverters and latch-type charge pumps in CMOS technology suffer from parasitic bipolar effects, leading to malfunction due to the activation of parasitic bipolar transistors, which can cause improper functioning of the charge pump.

Innovation Solution

The architecture is modified to include only NMOS transistors with triple well devices to avoid parasitic bipolar effects, using a bipolar isolating well to control the transistors and prevent parasitic transistor activation, ensuring proper operation of the charge pump.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If CMOS technology with complementary p-type and n-type MOSFETs is used for logic functions, then the charge pump can be fabricated using conventional processes, but parasitic bipolar effects occur leading to malfunction

Engineering Contradiction:
Improveconventional CMOS fabrication processVSAvoidcharge pump operation
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent extracts and removes the problematic parasitic bipolar transistor from the circuit by using triple-well isolation technology. The deep n-well is isolated from the p-substrate, preventing the formation of parasitic bipolar effects while maintaining conventional CMOS fabrication compatibility.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediate deep n-well structure between the p-substrate and the n-type MOSFETs. This intermediate well acts as a mediator that isolates the parasitic bipolar transistor, preventing harmful effects while allowing the charge pump to operate reliably using standard CMOS processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If conventional latch architecture is used, then the charge pump structure is simple, but parasitic bipolar transistors are activated causing malfunction

Engineering Contradiction:
Improvecharge pump structureVSAvoidcharge pump operation
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent extracts the parasitic bipolar transistor from the conventional latch architecture by implementing triple-well isolation. The deep n-well is isolated from the p-substrate, removing the harmful parasitic effects while preserving the simple latch structure and its reliable operation.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If triple well devices with bipolar isolating well are used, then parasitic bipolar effects are eliminated, but device structure becomes more complex

Engineering Contradiction:
Improvecharge pump operationVSAvoidtransistor structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the triple-well isolation structure with the conventional CMOS fabrication process. By integrating the deep n-well isolation into the standard process flow, the patent eliminates parasitic bipolar effects without significantly increasing manufacturing complexity, as the isolation is achieved through process integration rather than additional discrete components.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11309793B2Latch-type charge pump
Publication Date: 2022.04.19 FERROELECTRIC MEMORY GMBH
  • US11309793B2 patent drawing
  • US11309793B2 patent drawing
  • US11309793B2 patent drawing

AI summary

According to various aspects, a latch-type charge pump may include: an input node and an output node; a first charge storage and a second charge storage coupled in parallel to each other, a first switch coupled to the input node and a second switch coupled to the output node, wherein the first charge storage couples the first switch with the second switch; and a control circuit configured to control the first switch based on a state of the second charge storage, and to control the second switch based on a state of the first charge storage.