Latch-Up Protection Circuit for CMOS Integrated Circuits
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Solution Overview
Problem
Integrated circuits, particularly CMOS-type, are vulnerable to latch-up phenomena due to parasitic thyristor structures, which can lead to destructive inrush currents triggered by overvoltage, current injection, or radiation, and existing techniques to mitigate this either counteract miniaturization or increase manufacturing costs.
Innovation Solution
A method and device for detecting latch-up conditions in integrated circuits, involving current injection detection and supply voltage modification, such as cutting off or stepping down the supply voltage, to prevent permanent latch-up establishment, using a combination of detector circuits and supply voltage control mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If parasitic thyristor structures are present in CMOS integrated circuits, then the circuit can be manufactured using standard CMOS processes, but the circuit becomes vulnerable to latch-up phenomena causing destructive inrush currents
Solution Approach 1:
The invention performs preliminary detection of latch-up conditions by monitoring voltage parameters before the destructive latch-up state fully establishes. The detection circuit identifies early signs of parasitic thyristor activation and triggers preventive action by modifying supply voltage parameters, thereby preventing the harmful inrush current from becoming permanently established while maintaining standard CMOS manufacturing processes
2Reliability
If detection circuits and supply voltage control mechanisms are added to prevent latch-up, then circuit reliability improves, but device complexity increases
Solution Approach 1:
The detection circuit utilizes existing CMOS circuit structures and voltage monitoring nodes that are already present in standard CMOS designs. By repurposing existing circuit elements for dual functions (original logic function plus latch-up detection), the invention achieves reliable latch-up protection without adding separate dedicated protection circuits, thereby minimizing the increase in device complexity
Data Source
AI summary
Device for protecting an integrated circuit, comprising a device for detecting a latch-up condition, and a supply voltage control device for controlling a supply voltage of the integrated circuit, to modify a parameter of the supply voltage of the integrated circuit in order to prevent the latch-up from becoming permanently established.