Latch-Up Current Detection With Voltage Drop Recovery

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Solution Overview

Problem

Semiconductor devices with sensitive circuitry are vulnerable to environmental events like single-event latch-up, which can be catastrophic for high-reliability and functional safety applications, and existing mitigation techniques are costly and restrictive.

Innovation Solution

A semiconductor device system with a system controller and power management unit that monitors current and reduces the voltage supply below the hold voltage of a parasitic silicon-controlled rectifier to clear latch-up conditions, minimizing impact on functional safety and avoiding costly design rules.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional single-event latch-up mitigation techniques are used, then reliability is improved, but manufacturing cost increases and design flexibility is reduced

Engineering Contradiction:
Improvefunctional safetyVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The system automatically detects latch-up conditions through current monitoring and self-corrects by reducing voltage supply below the hold voltage of the parasitic SCR, eliminating the need for external intervention or costly specialized materials. The device serves itself to clear the latch-up condition and restore normal operation.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention changes the voltage parameter dynamically - reducing the voltage supply to below the hold voltage threshold during latch-up conditions and restoring it when normal operation is detected. This parameter-based approach replaces costly physical design changes with flexible electrical control.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If traditional single-event latch-up mitigation techniques are used, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvefunctional safetyVSAvoiddesign rules
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The power management unit performs multiple functions: normal voltage regulation, latch-up detection through current monitoring, and latch-up mitigation through voltage reduction. This multi-functional approach consolidates what would otherwise require separate specialized circuits into a single integrated unit.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system continuously monitors current consumption and uses this feedback to detect abnormal latch-up conditions. The feedback loop enables real-time detection and automatic correction without complex external control systems or specialized design rules.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Effectively detects and mitigates single-event latch-up, reducing the risk to functional safety systems while avoiding costly traditional mitigation methods.

Implementation Method 1

the system is configured to reduce the voltage value of the voltage supply signal to a voltage value lower than a hold voltage of a parasitic silicon-controlled rectifier

Methodology Applied
Scientific EffectParasitic silicon-controlled rectifier (SCR) hold voltage effect:

Data Source

PatentUS20240364342A1System having single-event latch-up detection and mitigation
Publication Date: 2024.10.31 NXP USA INC
  • US20240364342A1 patent drawing
  • US20240364342A1 patent drawing
  • US20240364342A1 patent drawing

AI summary

A method of detecting and mitigating an SEL is provided. The method includes measuring a current of a first circuit block of a semiconductor device and determining that the measured current exceeds a first threshold. In response to the measured current exceeding the first threshold, a supply voltage of the first circuit block is reduced from a nominal voltage value to a predetermined voltage value. After reducing the supply voltage to the predetermined voltage value, the supply voltage is restored to the nominal voltage value.