Latch-XOR Power-On Detection for IC Startup Communication
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Solution Overview
Problem
In integrated circuit devices (ICs), differing power-on times among circuit blocks can lead to miscommunication due to unique power supplies and architectures, causing issues during startup and power interruptions.
Innovation Solution
A power-on detection system using a latch and exclusive OR circuit to determine when a circuit block has reached a stable power-on state, preventing miscommunication by generating an output signal indicating the power-on state, which is implemented with a static memory cell and a disabling block for monitoring and controlling power supply coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If each circuit block is powered by a unique power supply with different architectures and device types, then each circuit block can be optimized for its specific function, but the power-on times of different circuit blocks differ, causing miscommunication during startup and power interruptions
Solution Approach 1:
The patent implements a power-on detection circuit that continuously monitors the power supply voltage of each circuit block and provides feedback signals indicating whether the block has reached its operational voltage threshold. This feedback mechanism allows other circuit blocks to know when it is safe to initiate communication, preventing miscommunication during startup and power recovery scenarios while maintaining the ability of each block to use its optimized power supply configuration
2Loss of time
If circuit blocks attempt to communicate immediately after power is supplied, then startup time is reduced, but miscommunication occurs because some circuit blocks may not have reached their operational state
Solution Approach 1:
The patent employs power-on detection circuits that are activated simultaneously with power supply to each circuit block. These detection circuits perform preliminary monitoring of voltage thresholds before communication is attempted, ensuring that each block is ready for communication before any data exchange occurs. This preliminary action prevents miscommunication while minimizing startup delay by detecting power-on status as soon as voltage thresholds are reached
3Reliability
If power-on detection circuits are implemented for all circuit blocks, then miscommunication is prevented and communication reliability is improved, but the device complexity and power consumption increase
Solution Approach 1:
The patent divides the power-on detection function into separate, independent detection circuits for each circuit block. Each detection circuit is a simple voltage threshold comparator that monitors only its associated block's power supply. This segmentation approach maintains high communication reliability by ensuring each block's readiness is independently verified, while keeping individual detection circuits simple and minimizing overall system complexity
4Reliability
If power-on detection circuits are implemented for all circuit blocks, then miscommunication is prevented and communication reliability is improved, but static power consumption increases
Solution Approach 1:
The patent implements power-on detection circuits that operate in a periodic or event-driven manner rather than continuously. The detection circuits are activated when power is supplied to the integrated circuit device and remain active only until power-on status is confirmed for all blocks. After initial startup detection, the circuits can enter a low-power state or be selectively reactivated only when power interruptions are detected, thereby maintaining communication reliability while minimizing static power consumption during normal operation
Data Source
AI summary
A system for detecting power-on of a circuit block within an integrated circuit (IC). The system can include a latch including a latch output and an inverted latch output. The latch can be coupled to, and powered by, a power supply providing power to the circuit block within the IC. The system further can include an exclusive OR circuit. The exclusive OR circuit can include an input stage coupled to the latch output and the inverted latch output. The exclusive OR circuit generates an output signal indicating whether the circuit block is in a power-on state.