Latched Comparator Current Reuse for Low-Power Fast Resolution
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Solution Overview
Problem
Existing high-speed latched comparators consume significant power due to the pre-amplifier function, which is undesirable and necessitates the development of more efficient systems and methods.
Innovation Solution
The implementation of a comparator circuit that includes a pre-amplifier, a latch circuit, and a current re-use circuit, where the current re-use circuit applies current to the pre-amplifier during the transparent phase and to the latch circuit during the latch phase, utilizing transistor pairs to minimize power consumption and maximize current availability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a pre-amplifier is continuously active in a latched comparator, then the comparator can quickly respond to input changes, but power consumption increases significantly
Solution Approach 1:
The pre-amplifier is made dynamically controllable through a clock signal that switches it between active and inactive states. During the transparent phase, the pre-amplifier is active to quickly amplify input differences. During the latch phase, it is deactivated to reduce power consumption while the latch circuit maintains the output state.
Solution Approach 2:
The pre-amplifier operates periodically rather than continuously, being activated only during the transparent phase when input sampling occurs. The clock signal controls this periodic operation, turning the pre-amplifier off during the latch phase to minimize power consumption while maintaining functional performance.
2Reliability
If current is diverted to the latch circuit during latching, then the latch can quickly resolve metastability, but the pre-amplifier current decreases
Solution Approach 1:
The current distribution to the pre-amplifier and latch circuit is dynamically switched based on the operational phase. During the transparent phase, current flows to the pre-amplifier for signal amplification. During the latch phase, the clock signal redirects current to the latch circuit to ensure rapid metastability resolution, while the pre-amplifier is simultaneously deactivated.
Solution Approach 2:
The current re-use circuit automatically redirects current from the pre-amplifier to the latch circuit based on the clock signal phase, eliminating the need for separate current sources. This self-service mechanism ensures that the latch circuit receives sufficient current for reliable operation without requiring additional power supply infrastructure.
3Use of energy by moving object
If the comparator operates in a latched mode, then power can be reduced during latching, but bandwidth is limited by the latching mechanism
Solution Approach 1:
The comparator operation is segmented into distinct phases: transparent phase for high-speed signal amplification and latch phase for low-power state maintenance. The clock signal controls this segmentation, allowing the circuit to achieve high bandwidth during the transparent phase when the pre-amplifier is active, then transition to low-power mode during the latch phase.
Solution Approach 2:
The comparator operates periodically with alternating transparent and latch phases. During the transparent phase, the full bandwidth is available for signal processing. During the latch phase, power consumption is reduced while the output state is maintained. This periodic operation achieves both high bandwidth and low power consumption at different times in the operational cycle.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption and improves bandwidth by reusing current from the pre-amplifier in the latch circuit, enhancing power performance and reducing resolution time while minimizing metastability errors.
Implementation Method 1
the current re-use circuit includes two transistor pairs. One of the transistors of each of the transistor pairs are on when the clock signal is asserted, and the other transistor of each of the transistor pairs are on when the clock signal is de-asserted
Data Source
AI summary
Various systems and methods for comparing signals are disclosed herein. For example, some embodiments of the present invention provide comparator circuits with a preamplifier circuit, a latch circuit and a current re-use circuit. The current re-use circuit applies a current to the preamplifier circuit during a transparent phase, and applies a similar current to the latch circuit during a latch phase.