Latched Comparator Inductor Isolation for Load Capacitance

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Solution Overview

Problem

Conventional latched comparators face issues with voltage drop due to resistive isolation, which affects the voltage swing and introduces additional losses, while inductive isolation methods can compromise latch time constants and power dissipation.

Innovation Solution

Incorporating a series-shunt amplifier configuration with inductors that isolate the latch from load capacitance during the hold phase, utilizing grounding transistors to provide a path to ground for inductors during the tracking phase, thereby minimizing voltage loss and maintaining latch performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If resistors are used to isolate the latch from load capacitance, then the latch is isolated from load capacitance, but voltage drop occurs and voltage swing is reduced

Engineering Contradiction:
Improvelatch isolationVSAvoidvoltage loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent introduces inductors as intermediary elements between the latch and load capacitance, replacing resistors. These inductors provide isolation during the hold phase while having minimal impact on voltage swing during the track phase, thus resolving the contradiction between isolation effectiveness and voltage loss.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs dynamic switching of the latch circuit between track phase and hold phase. During the track phase, the latch is disabled allowing direct connection; during the hold phase, the latch is enabled providing isolation. This dynamic operation eliminates the need for continuous resistive isolation, reducing voltage loss while maintaining isolation when needed.

Inventive Principle:
Principle #15Dynamics

2Loss of energy

If inductors are used for isolation, then voltage loss is reduced, but latch time constants and power dissipation are affected

Engineering Contradiction:
Improvevoltage lossVSAvoidlatch time constant
Core Design Contradiction:
Loss of energyVSDuration of action of moving object

Solution Approach 1:

The patent uses periodic switching between track phase and hold phase. The inductors are only actively involved during the hold phase for isolation, while during the track phase they have minimal impact. This periodic operation allows the system to benefit from inductive isolation without continuously affecting latch time constants and power dissipation.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces voltage loss and maintains latch performance by using inductors instead of resistors for isolation, achieving lower power dissipation and improved latch time constants compared to conventional designs.

Implementation Method 1

inductors L1 and L2 are provided, which generally provide shunt peaking in the tracking phase

Methodology Applied
Scientific EffectShunt peaking: Inductor

Implementation Method 2

the second set of inductors are adapted to isolate the latch from a load capacitance

Methodology Applied
Scientific EffectInductive isolation: Inductor

Implementation Method 3

the latch includes a plurality of grounding transistors that are each associated with at least one inductor from the second set of inductors so as to provide a path to ground for each inductor from the second set in the tracking phase

Methodology Applied
Scientific EffectTransistor conduction: Conduction (electrical)

Data Source

PatentUS8258819B2Latched comparator having isolation inductors
Publication Date: 2012.09.04 TEXAS INSTRUMENTS INC
  • US8258819B2 patent drawing
  • US8258819B2 patent drawing
  • US8258819B2 patent drawing

AI summary

Traditionally, latched comparators have suffered from performance problems related to exposure of the latch to load capacitances. Even attempts to isolate the latch from the load capacitances by way of resistors has resulted in performance problems (namely, voltage swing degradation). Here, however, a latched comparator is provided that employs inductors to generally provide isolation from load capacitances, which generally improves performance. Moreover, the latch has been modified to accommodate the inductors during a track period (namely, provision of grounding paths).