Latch-up Immune ESD Protection Circuit
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Solution Overview
Problem
Conventional silicon controlled rectifier (SCR) circuits used for ESD protection in integrated circuits (ICs) are prone to latch-up during normal operation, which can render ICs defective.
Innovation Solution
An ESD module with a latch-up control circuit that operates in two modes: a low triggering current mode (<100 mA) for quick ESD protection and a high triggering current mode (>100 mA) to prevent latch-up, utilizing a silicon-controlled rectifier (SCR) ESD circuit with a latch-up control circuit that includes a high power source and low power source terminals, and a parasitic circuit with bipolar junction transistors to manage current paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the triggering current is set low for quick ESD response, then ESD protection speed is improved, but latch-up occurs during normal operation
Solution Approach 1:
The patent changes the electrical parameter (triggering current threshold) of the SCR circuit based on the operating condition. A mode detection circuit identifies whether the IC is in ESD protection mode or normal operation mode, and accordingly adjusts the triggering current threshold between a first value (lower) for fast ESD response and a second value (higher) for latch-up prevention. This parameter change strategy allows the system to optimize ESD response speed when needed while preventing latch-up during normal operation.
Solution Approach 2:
The triggering current threshold is made dynamic rather than fixed, allowing the system to adapt to different operating modes. The mode detection circuit triggers a switching mechanism that dynamically changes the SCR's triggering characteristics, enabling the circuit to exhibit low-threshold behavior during ESD events for fast response and high-threshold behavior during normal operation for stability.
2Reliability
If the triggering current is set high to prevent latch-up, then latch-up immunity is improved, but ESD response speed decreases
Solution Approach 1:
The patent implements conditional parameter modification where the triggering current threshold is changed based on detected operating conditions. During normal operation, a higher second threshold value is applied to prevent latch-up. When an ESD event is detected, the system switches to a lower first threshold value to enable rapid response. This conditional parameter change resolves the trade-off between latch-up immunity and ESD response speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The ESD module effectively prevents latch-up during normal IC operation while enabling quick triggering of the ESD circuit to protect internal circuits from damage, ensuring reliable operation by maintaining a triggering current below the latch-up threshold in the ESD mode and above in the latch-up mode.
Implementation Method 1
Electrostatic discharge (ESD) generated from static electricity is usually characterized by fast transient high voltage discharge
Implementation Method 2
a parasitic circuit with bipolar junction transistors to manage current paths
Data Source
AI summary
An ESD module is presented. The ESD module includes an ESD circuit and a latch-up (LU) control circuit. The ESD circuit has a pad terminal and a low power source terminal. The LU control circuit includes a first LU terminal coupled to a high power source and an LU output terminal coupled to the ESD circuit. The ESD module has first and second operating modes. In the first operating mode, the LU control circuit is deactivated and the ESD circuit has a first triggering current It1 which is less than 100 mA. In the second operating mode, the LU control circuit is activated and the ESD circuit has a second triggering current It2 which is greater than 100 mA.