Latency Measurement Using Shared Clock and Optical Sensor

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Solution Overview

Problem

Existing methods for measuring and compensating end-to-end latency in human-computer interaction systems are cumbersome and lack precision, particularly in real-world applications, due to the difficulty in synchronizing clocks between input and output devices.

Innovation Solution

A system using a shared clock for the processing device and acquisition device, employing a two-dimensional periodic image with specific pixel patterns to measure latency, and a software development toolkit for real-time compensation of latency and jitter, utilizing an optical sensor to track the movement of a calibrated output on the screen.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If an external acquisition device such as a camera is used to detect cursor movement for measuring latency, then measurement capability is achieved, but synchronization precision between the processing device and camera deteriorates

Engineering Contradiction:
Improvelatency measurement precisionVSAvoidclock synchronization reliability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent merges the clock resources of the processing device and acquisition device by sharing a single clock between them. This eliminates the synchronization problems between separate clocks, allowing precise latency measurement through a unified time reference that both devices use simultaneously.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared clock serves multiple functions: it provides the time reference for the processing device, the time reference for the acquisition device, and enables precise synchronization between them. This single clock performs what would otherwise require multiple independent timekeeping systems.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If a shared clock is used between processing device and acquisition device, then clock synchronization precision is improved, but device complexity increases

Engineering Contradiction:
Improvelatency measurement precisionVSAvoidclock sharing architecture complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the clock resources of the processing device and acquisition device by sharing a single clock between them. This eliminates the synchronization problems between separate clocks, allowing precise latency measurement through a unified time reference that both devices use simultaneously.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables precise measurement and real-time compensation of latency and jitter, improving user experience by reducing system lag and variance, applicable to various input and output interfaces, including audio interfaces.

Implementation Method 1

utilizing an optical sensor to track the movement of a calibrated output on the screen

Methodology Applied
Scientific EffectOptical detection: Photoelectric Effect

Data Source

PatentEP3159776B1Arrangement to measure and use latency between an input interface and an output interface of a processing device
Publication Date: 2019.11.20 ECOLE NATIONALE DE LAVIATION CIVILE
  • EP3159776B1 patent drawingFigure 1~2
  • EP3159776B1 patent drawingFigure 3a~3b
  • EP3159776B1 patent drawingFigure 4a~4c

AI summary

The invention discloses a method to measure end-to-end and partial latency between an input interface and an output interface of a processing device. The invention uses a generator of a calibrated output to be output by the processing device through the output interface and a sensor configured to capture the calibrated output and send it to a processing unit of the processing device through the input interface. An advantageous arrangement of a calibrated output is a specific texture to be output by a screen and captured by an optical sensor. A specific texture comprises elementary patterns which have a defined number of pixels and a defined proportion and location of dark and light pixels. According to certain aspects of the invention, a calibration of latency is performed based on a number of parameters defining the hardware and/or software configuration of the processing device, and/or its conditions of operation. In specific embodiments, a calibration routine and/or a compensation routine of latency of the processing device may be performed in real time.