Latency Measurement Using Multi-Phase Clock Signals

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Solution Overview

Problem

Current methods for measuring signal latency are limited by the frequency of the clock signal, leading to measurement errors and increased power consumption, and fail to accurately capture real-time changes in latency due to ambient temperature variations.

Innovation Solution

Measuring latency between signals using multiple clock signals of the same frequency but different phases, with a zero-phase-difference clock signal, to obtain more accurate and real-time latency measurements by determining and selecting the smallest measurement value from a set of values based on phase differences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a clock with higher frequency is used to improve latency measurement accuracy, then measurement precision is improved, but power consumption increases and time sequence becomes tighter

Engineering Contradiction:
Improvelatency measurement accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The measurement process is segmented into multiple phases corresponding to different clock phases. Instead of using a single high-frequency clock, the patent divides the measurement into four phases using a lower-frequency clock signal with different phase shifts (0°, 90°, 180°, 270°). Each phase captures a portion of the latency measurement, and these segmented measurements are combined to achieve the final high-precision result.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a one-dimensional time-based measurement (single clock frequency) to a two-dimensional measurement space by introducing phase as an additional dimension. By measuring latency across multiple phase dimensions of a lower-frequency clock signal, the system achieves high measurement precision without requiring high clock frequency, thereby reducing power consumption.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If a clock with higher frequency is used to improve latency measurement accuracy, then measurement precision is improved, but the time sequence of the logic circuit becomes tighter

Engineering Contradiction:
Improvelatency measurement accuracyVSAvoidtime sequence constraints
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The measurement process is segmented into multiple phases corresponding to different clock phases. Instead of using a single high-frequency clock, the patent divides the measurement into four phases using a lower-frequency clock signal with different phase shifts (0°, 90°, 180°, 270°). Each phase captures a portion of the latency measurement, and these segmented measurements are combined to achieve the final high-precision result.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a one-dimensional time-based measurement (single clock frequency) to a two-dimensional measurement space by introducing phase as an additional dimension. By measuring latency across multiple phase dimensions of a lower-frequency clock signal, the system achieves high measurement precision without requiring high clock frequency, thereby reducing power consumption.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If latency measurement is performed in real-time to track ambient temperature variations, then adaptability is improved, but measurement precision may be compromised due to lower clock frequency

Engineering Contradiction:
Improvereal-time latency trackingVSAvoidlatency measurement accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent employs periodic action by using a divided-by-4 clock signal that generates four phase-shifted clock signals in a repeating cycle. This periodic structure allows the system to perform measurements at multiple phase points throughout each clock cycle, enabling real-time latency tracking while maintaining high measurement precision through the combination of periodic phase sampling.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent transitions from a one-dimensional time-based measurement (single clock frequency) to a two-dimensional measurement space by introducing phase as an additional dimension. By measuring latency across multiple phase dimensions of a lower-frequency clock signal, the system achieves high measurement precision without requiring high clock frequency, thereby reducing power consumption.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentEP3479176B1Signal processing apparatus and method, and electronic device comprising the apparatus
Publication Date: 2023.06.21 ALCATEL LUCENT SA
  • EP3479176B1 patent drawingFigure 1
  • EP3479176B1 patent drawingFigure 2a
  • EP3479176B1 patent drawingFigure 2b

AI summary

According to the embodiments in the present invention, there is provided a signal processing method and a signal processing apparatus for measuring latency between signals, and performing latency compensation for a to-be-compensated signal according to a measured latency. By measuring the latency between signals using multiple clock signals of the same frequency but different phases, not only the accuracy of the obtained latency measurement result is made higher, but also design and implementation of a latency-measuring circuit is made less difficult, such that a better system performance can be obtained more easily.