Lateral Base Link Structure for Lower HBT Resistance and Capacitance
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Solution Overview
Problem
Heterojunction bipolar transistors (HBTs) face limitations in maximum oscillation frequency due to high base resistance and collector-base junction capacitance, which are inherent to their design, leading to a trade-off between these parasitic components.
Innovation Solution
A lateral base link region is formed between the extrinsic and intrinsic base layers of the HBT, using a combination of monocrystalline and polycrystalline semiconductor materials, which reduces base resistance and collector-base capacitance by being separated from the collector region by a passivation layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional HBT structure is used with direct connection between base layers and collector region, then base resistance is reduced, but collector-base junction capacitance increases
Solution Approach 1:
The base link region is segmented into two distinct portions: a first portion made of monocrystalline semiconductor material and a second portion made of polycrystalline semiconductor material. This segmentation allows each portion to contribute different properties - the monocrystalline portion provides low resistance while the polycrystalline portion, being separated from the collector by passivation layer, minimizes capacitance coupling.
Solution Approach 2:
Different material qualities are applied to different regions of the base link structure. The first portion uses monocrystalline material with superior electrical properties for direct contact with intrinsic base, while the second portion uses polycrystalline material that can be effectively isolated from the collector region. This local quality differentiation optimizes both resistance and capacitance characteristics.
2Object-generated harmful factors
If base link region is separated from collector region by passivation layer, then collector-base capacitance is reduced, but base resistance increases
Solution Approach 1:
The base link region is divided into two portions with different materials and functions. The first portion (monocrystalline) maintains low resistance by directly contacting the intrinsic base layer, while the second portion (polycrystalline) is positioned to be separated from the collector region by the passivation layer, thus reducing capacitance. This segmentation resolves the trade-off between resistance and capacitance.
Solution Approach 2:
The base link region employs a composite structure combining monocrystalline and polycrystalline semiconductor materials. The monocrystalline portion provides excellent electrical conductivity for low resistance, while the polycrystalline portion, when isolated by passivation layer, minimizes capacitive coupling to the collector. This composite approach allows simultaneous optimization of both parameters.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively decreases base resistance and collector-base capacitance, enhancing the HBT's performance by independently optimizing the lateral base link region and maintaining low collector-base capacitance.
Implementation Method 1
The lateral base link region is disposed on the passivation layer and directly contacts respective side surfaces of the extrinsic base layer and the intrinsic base layer
Implementation Method 2
The lateral base link region is separated from the collector region by at least the passivation layer
Data Source
AI summary
A semiconductor device, such as a heterojunction bipolar transistor (HBT), may include an extrinsic base region an intrinsic base region, and a lateral base link region disposed between and in contact with each of the extrinsic base region and an intrinsic base region. The extrinsic base region, the lateral base link region, and a portion of the intrinsic base region each may be formed on a passivation layer disposed over an isolation region and a collector region of a substrate of the semiconductor device. The extrinsic base region and a first portion of the lateral base link region may be formed from polycrystalline semiconductor material. The intrinsic base region and a second portion of the lateral base link region may be formed from monocrystalline semiconductor material. The lateral base link region may be formed after formation of the extrinsic base region and the intrinsic base region.