Lateral BJT Junction Control via Hot Angle Ion Implantation
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Solution Overview
Problem
Controlling the doping of emitter/base and collector/base junctions in lateral bipolar junction transistors (BJTs) using regular ion-implant techniques is challenging due to insufficient depth control, leading to non-uniform lateral and vertical profiles, especially in germanium channel devices which are sensitive to epitaxial pre-bake processes.
Innovation Solution
A method involving trench isolations, hot angle ion implantation, and epitaxial growth of Si or SiGe layers to form channels, with precise control of junction edges and profiles, and annealing to form heavily doped junctions, is employed to accurately position and dope the junctions in lateral BJTs, using a germanium-on-insulator substrate with a buried oxide layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If regular ion-implant techniques are used to dope emitter/base and collector/base junctions, then the doping process is simple and fast, but the depth control is insufficient resulting in non-uniform lateral and vertical profiles
Solution Approach 1:
The patent transitions from conventional planar ion implantation to angled ion implantation, introducing a spatial dimension change by implanting ions at an angle (e.g., 45 degrees) relative to the substrate surface. This angular approach enables better control over the lateral and vertical distribution of dopants, achieving uniform junction profiles while maintaining efficient doping processes.
2Reliability
If epitaxial pre-bake process is applied to germanium channel devices, then the epitaxial growth is improved, but the germanium interfaces between emitter/collector channels and base become less than optimal due to germanium's lower melting point
Solution Approach 1:
The patent modifies the thermal processing parameters by eliminating or significantly reducing the epitaxial pre-bake step for germanium channel devices. Instead, the process uses controlled ion implantation followed by annealing at optimized temperatures and times, changing the thermal history parameters to prevent germanium interface degradation while still achieving the desired epitaxial growth quality.
3Manufacturing precision
If angled ion implantation is used to improve junction control, then the lateral and vertical profile uniformity is improved, but the process complexity increases
Solution Approach 1:
The patent employs preliminary masking steps and precise alignment procedures before angled ion implantation to ensure accurate dopant placement. By preparing the substrate and mask structures in advance with well-defined geometries, the complex angled implantation process achieves high junction profile uniformity without requiring continuous complex adjustments during implantation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables precise control of junction positions and reduces crystallographic defects, resulting in improved uniformity and performance of lateral BJTs by forming accurately positioned and doped emitter and collector channels adjacent to base layers.
Implementation Method 1
implanting ions into an exposed vertical side of the intrinsic base semiconductor layer under the sidewall spacers to form a junction edge/profile
Implementation Method 2
annealing the implanted ions
Implementation Method 3
annealing the implanted ions
Implementation Method 4
epitaxially growing a doped Si or SiGe layer on the exposed vertical side of the recessed intrinsic base semiconductor layer, the faceted surface of the germanium layer adjacent the sidewall spacer, and the exposed vertical side of the junction edge/profile to form a channel
Data Source
AI summary
A method of controlling formation of junctions in a lateral bipolar junction transistor comprises: providing a starting substrate comprising a bulk silicon material as a handle substrate, a buried oxide layer on the handle substrate, and an intrinsic base semiconductor layer of germanium on the buried oxide layer; forming an extrinsic base layer on the intrinsic base semiconductor layer; etching at least a portion of the base layer; disposing a sidewall spacer on a side of the base layer; disposing a faceted germanium layer adjacent the sidewall spacer; recessing the faceted germanium layer and the intrinsic base semiconductor layer below the sidewall spacer; using a hot angle ion implantation technique to implant ions into a side of the intrinsic base semiconductor layer to form a junction edge/profile; annealing the implanted ions; and epitaxially growing a Si or SiGe layer on the germanium layer and the junction edge/profile.