Lateral Discrete Device Embedding in Chip Module Side Walls
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Solution Overview
Problem
The challenge in modern microelectronic system development is to reduce system dimensions while maintaining or improving performance, which requires innovative methods for embedding discrete electronic devices within chip modules to optimize space usage and electrical connectivity.
Innovation Solution
A method for embedding discrete electronic devices laterally into the side walls of chip modules, utilizing a multilayer substrate with recesses and electrically conductive layers to establish efficient connections, allowing for the integration of capacitors and other components in a space-saving manner, while maintaining accessibility and electromagnetic compatibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If discrete electronic devices are placed on top of a chip module, then low resistive contact to voltage layer is achieved, but available mounting space is limited
Solution Approach 1:
The patent transitions from placing discrete electronic devices on the top surface of the chip module to embedding them laterally in the side walls. This dimensional change from vertical placement to lateral embedding utilizes the previously underutilized side wall space, thereby increasing available mounting space while maintaining electrical connectivity through conductive layers integrated into the side wall structure.
Solution Approach 2:
The discrete electronic devices are embedded within recesses formed in the side walls of the chip module, effectively nesting components within the module's structural volume rather than placing them externally on the top surface. This nesting approach maximizes space utilization while preserving electrical contact quality.
2Volume of moving object
If chip dimensions are reduced, then system size is decreased, but space for discrete electronic devices is further limited
Solution Approach 1:
By moving discrete device placement from the top surface to the side walls, the patent enables continued reduction of chip top surface area without compromising mounting space for discrete devices. The side wall embedding approach decouples the relationship between chip area and device mounting space, allowing independent optimization of both parameters.
Solution Approach 2:
The patent creates localized mounting regions in the side walls with specific electrical and mechanical properties tailored for discrete device integration. These localized regions provide appropriate electrical contact, mechanical support, and thermal management without requiring changes to the entire chip structure, enabling size reduction while preserving functional space.
3Area of stationary object
If discrete electronic devices are embedded in side walls, then mounting space is increased, but manufacturing complexity increases
Solution Approach 1:
The patent incorporates conductive layers and recesses into the side wall structure during the chip module manufacturing process itself, before discrete devices are mounted. This preliminary preparation of mounting locations and electrical connections integrates the embedding process into the existing manufacturing workflow, avoiding the need for separate post-assembly steps and reducing overall manufacturing complexity.
Data Source
AI summary
The invention relates to a method for embedding a discrete electronic device in a chip module. The chip module comprises a multilayer substrate which comprises a plurality of electrically conductive layers stacked above each other and an electrically non-conductive layer arranged between each pair of electrically conductive layers. The chip module is configured to receive one or more chips to be mounted onto a top surface thereof. Each electrically conductive layer comprises one or more electrically conductive structures. A recess is provided in a side surface of the chip module. The discrete electronic device is inserted into the recess. A first electrically conductive connection between a first electrical contact of the discrete electronic device and a first electrically conductive structure is established. Further, a second electrically conductive connection between a second electrical contact of the discrete electronic device and a second electrically conductive structure is established.