Lateral Epitaxy for High Density DRAM Memory Cells
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Solution Overview
Problem
Dynamic random access memory (DRAM) structures face challenges with charge leakage and alpha-particle noise, limiting integration density and requiring frequent refresh cycles, especially when operating at reduced voltages with compromised semiconductor quality above deep trench storage nodes.
Innovation Solution
A memory cell structure is developed with a storage node surrounded by dielectric and an access transistor made of monocrystalline semiconductor material, grown using lateral epitaxial techniques to prevent crystal lattice dislocations, ensuring high-quality semiconductor material and effective isolation, allowing for reduced charge leakage and improved alpha-particle noise immunity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If deep trench capacitors are used to increase storage capacity, then integration density is improved, but semiconductor material quality above the storage node deteriorates due to crystal lattice dislocations
Solution Approach 1:
The patent divides the semiconductor structure into distinct layers: a first semiconductor layer forming the deep trench capacitor and a second semiconductor layer grown epitaxially above it. This segmentation allows the first layer to provide storage capacity while the second layer provides high-quality semiconductor material for transistors, resolving the contradiction between storage capacity and material quality.
Solution Approach 2:
The patent introduces an intermediary epitaxial growth process that grows a second semiconductor layer above the first semiconductor layer. This intermediary layer acts as a buffer that prevents crystal lattice dislocations from propagating from the deep trench capacitor region to the transistor region, thereby maintaining semiconductor material quality while preserving storage capacity.
2Area of stationary object
If access transistors are placed above the storage node to increase integration density, then device area is reduced, but charge leakage increases due to compromised semiconductor quality
Solution Approach 1:
By segmenting the semiconductor structure into a first layer for storage and a second epitaxial layer for transistor formation, the patent enables placement of access transistors above the storage node while preventing charge leakage. The segmentation ensures that the transistor region has high-quality semiconductor material free from crystal lattice dislocations, maintaining low leakage currents despite high integration density.
Solution Approach 2:
The epitaxially grown second semiconductor layer serves as an intermediary that blocks the propagation of crystal lattice dislocations from the deep trench capacitor to the access transistor. This intermediary layer maintains semiconductor quality in the transistor region, preventing charge leakage even when transistors are positioned directly above storage nodes for high integration density.
3Reliability
If lateral epitaxial growth is used to improve semiconductor material quality, then manufacturing complexity increases, but this enables reduced charge leakage and improved reliability
Solution Approach 1:
The patent applies preliminary epitaxial growth to form the second semiconductor layer before transistor fabrication. This preliminary action creates a high-quality semiconductor substrate that prevents future reliability issues from crystal lattice dislocations, justifying the additional manufacturing steps by ensuring long-term device reliability and reduced charge leakage.
Solution Approach 2:
The epitaxial growth process introduces an intermediary manufacturing step that, while increasing process complexity, creates a buffer layer that prevents crystal lattice dislocation propagation. This intermediary layer significantly improves operational reliability and reduces charge leakage, making the additional manufacturing complexity worthwhile for achieving high-performance, reliable devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables high integration density DRAMs with reduced charge leakage and improved alpha-particle noise immunity, enabling reliable operation at reduced voltages with enhanced semiconductor quality and manufacturing yield.
Implementation Method 1
an access transistor formed of monocrystalline semiconductor material devoid of crystal lattice dislocations above a portion of the storage node
Data Source
AI summary
In a vertical dynamic memory cell, monocrystalline semiconductor material of improved quality is provided for the channel of an access transistor by lateral epitaxial growth over an insulator material (which complements the capacitor dielectric in completely surrounding the storage node except at a contact connection structure, preferably of metal, from the access transistor to the storage node electrode) and etching away a region of the lateral epitaxial growth including a location where crystal lattice dislocations are most likely to occur; both of which features serve to reduce or avoid leakage of charge from the storage node. An isolation structure can be provided in the etched region such that space is provided for connections to various portions of a memory cell array.