Lateral High-Voltage Transistor With Intermediate Well Region

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Solution Overview

Problem

Existing lateral high-voltage transistors face limitations in achieving high breakdown voltage and low on-resistance while allowing the source region to assume a higher voltage than the substrate, leading to degradation of safe-operating area and increased base resistance due to the separation of source and body regions.

Innovation Solution

A lateral high-voltage transistor design featuring a semiconductor layer with a source region, drain region, isolation layer, well regions, and buried layers, where the source region can assume a higher voltage than the substrate, with a gate structure that enhances pinch-off voltage and breakdown voltage, and optional features like body contact regions and spiral resistive field plates to manage voltage distribution and resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If the source region and body region are separated to allow the source region to assume higher voltage than the substrate, then the source region can operate at higher voltages, but the breakdown voltage is limited to about 10V and the base resistance of the parasitic bipolar transistor increases

Engineering Contradiction:
Improvesource region voltageVSAvoidbreakdown voltage and safe-operating area
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

An intermediate n-type well region is introduced between the source region and the substrate. This intermediate well acts as a mediator that enables the source region to operate at higher voltages while maintaining adequate breakdown voltage and safe-operating area characteristics by providing a controlled transition zone for voltage distribution.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent introduces a vertical dimension to the voltage distribution by creating multiple well regions at different depths. The intermediate n-type well is positioned between the source region and the substrate, establishing a three-dimensional voltage distribution structure that resolves the contradiction between source voltage elevation and breakdown voltage maintenance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the source region and body region are connected together to provide good ruggedness and safe-operating area, then the parasitic bipolar transistor effect is suppressed, but the source region cannot assume higher voltage than the substrate

Engineering Contradiction:
Improvesafe-operating areaVSAvoidsource region voltage
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The body region is segmented into multiple parts: the substrate, an intermediate n-type well region, and the source region. This segmentation allows the source region to be electrically isolated from the substrate while maintaining controlled electrical characteristics through the intermediate well, enabling higher source voltages without compromising safe-operating area.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The intermediate n-type well serves as an intermediary structure between the source region and the substrate. It provides a controlled electrical transition that allows the source region to operate at higher potentials while maintaining adequate breakdown characteristics and safe-operating area through the mediating effect of the intermediate well.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8686503B2Lateral high-voltage transistor and associated method for manufacturing
Publication Date: 2014.04.01 MONOLITHIC POWER SYSTEMS INC
  • US8686503B2 patent drawing
  • US8686503B2 patent drawing
  • US8686503B2 patent drawing

AI summary

The present disclosure discloses a lateral high-voltage transistor and associated method for making the same. The lateral high-voltage transistor comprises a semiconductor layer of a first conductivity type; a source region of a second conductivity type opposite to the first conductivity type in the semiconductor layer; a drain region of the second conductivity type in the semiconductor layer separated from the source region; a first isolation layer atop the semiconductor layer between the source region and the drain region; a first well region of the second conductivity type surrounding the drain region, extending towards the source region and separated from the source region; a second well region of the first conductivity type surrounding the source region; a gate positioned atop the first isolation layer above the second well region and an adjacent portion of the first well region; and a first buried layer of the first conductivity type under the first well region adjacent to the source region side of the lateral high-voltage transistor. A JFET is formed using the gate as a JFET top gate and the first buried layer as a JFET bottom gate.