Lateral Hyperabrupt Junction Varactor in SOI Substrate
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Solution Overview
Problem
The formation of a high-quality varactor diode with a hyperabrupt junction in a semiconductor-on-insulator (SOI) substrate is challenging due to the limited thickness of the top semiconductor layer, which complicates the creation of a sharp p-n junction and increases leakage current, compromising the effectiveness of MOS varactors.
Innovation Solution
A lateral hyperabrupt junction varactor diode is formed in the top semiconductor layer of an SOI substrate by creating a gate electrode and doped regions with angled ion implantations, allowing for a self-aligned formation of a p-n junction between the doped regions and the electrodes, thereby controlling the depletion and capacitance of the varactor diode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a MOS varactor is formed in a top semiconductor layer of an SOI substrate, then the device can be integrated with advanced semiconductor processes, but the leakage current increases due to the thin layer thickness
Solution Approach 1:
The patent transitions from a conventional vertical MOS varactor structure to a lateral varactor structure where the p-n junction extends horizontally beneath the gate electrode. This dimensional change allows the depletion region to form laterally rather than vertically, enabling effective varactor operation in thin SOI layers without suffering from the leakage issues associated with vertical junctions in ultra-thin substrates.
Solution Approach 2:
The patent divides the semiconductor layer into distinct doped regions (first doped region and second doped region with opposite conductivity types) that form a lateral p-n junction. This segmentation allows the formation of a hyperabrupt junction profile through selective ion implantation, creating a sharp depletion region boundary that reduces leakage while maintaining the thin SOI structure benefits.
2Manufacturing precision
If multiple ion implantation steps are used to form a hyperabrupt junction, then a sharp p-n junction can be achieved, but the process complexity increases and becomes difficult in thin SOI layers
Solution Approach 1:
The patent employs lateral ion implantation at angled directions to create the hyperabrupt junction profile in a single or reduced number of steps. By implanting dopants laterally from the sidewalls rather than vertically from the top surface, the process achieves sharp junction profiles without requiring multiple sequential implantation steps through the entire thickness of the SOI layer, thereby reducing process complexity.
Solution Approach 2:
The patent performs preliminary doping of the semiconductor layer to create the first doped region before forming the gate electrode. Subsequent ion implantation steps then create the second doped region with opposite conductivity type. This preliminary action establishes the foundation for the lateral p-n junction and allows for precise control of the hyperabrupt profile through controlled implantation from sidewalls, simplifying the overall process.
3Length of moving object
If the top semiconductor layer thickness is reduced to 100 nm or less, then device scaling is achieved, but the formation of a hyperabrupt junction becomes very difficult
Solution Approach 1:
The patent creates the hyperabrupt junction by lateral ion implantation from the sidewalls of the semiconductor layer rather than vertical implantation through the top surface. This lateral approach allows dopants to be introduced at controlled depths from the sidewalls, achieving the hyperabrupt profile in ultra-thin layers (100 nm or less) without requiring the dopants to traverse the entire thickness from the top, thereby making the process feasible for scaled devices.
Solution Approach 2:
The patent applies doping locally at the sidewalls of the semiconductor layer through angled ion implantation. By concentrating the doping action at specific lateral positions rather than uniformly from the top surface, the process achieves the required hyperabrupt junction profile in thin SOI layers with precise control over dopant distribution, making manufacturing easier despite the reduced thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of a high-quality varactor diode with a hyperabrupt junction on thin SOI substrates, reducing leakage current and improving the performance of varactor diodes in electronic circuits.
Implementation Method 1
The gate electrode controls the depletion of the first and second doped semiconductor regions, thereby varying the capacitance of the varactor diode
Implementation Method 2
A first electrode having a doping of a first conductivity type laterally abuts a doped semiconductor region having the first conductivity type
Data Source
AI summary
A varactor diode includes a portion of a top semiconductor layer of a semiconductor-on-insulator (SOI) substrate and a gate electrode located thereupon. A first electrode having a doping of a first conductivity type laterally abuts a doped semiconductor region having the first conductivity type, which laterally abuts a second electrode having a doping of a second conductivity type, which is the opposite of the first conductivity type. A hyperabrupt junction is formed between the second doped semiconductor region and the second electrode. The gate electrode controls the depletion of the first and second doped semiconductor regions, thereby varying the capacitance of the varactor diode. A design structure for the varactor diode is also provided.