Lateral IGBT ESD Protection with Avalanche Diode
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Solution Overview
Problem
Existing ESD protection circuits for high voltage semiconductor devices tend to cause short circuits when surge voltage is applied, are costly due to increased processing steps, and can be destroyed by DC voltage, especially when using IGBTs.
Innovation Solution
Incorporating a lateral IGBT with an avalanche diode in the collector region and a clamp driving circuit to manage surge voltage, reducing chip area and manufacturing cost while preventing device destruction from DC current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an IGBT is used in the ESD clamp circuit, then the ESD protection capability is improved, but the device tends to cause short circuit when surge voltage is applied and may be destroyed by DC voltage
Solution Approach 1:
An avalanche diode is introduced as an intermediary protective element between the IGBT and the surge voltage. The avalanche diode clamps the voltage to a safe level by conducting in reverse breakdown when the voltage exceeds its breakdown voltage, preventing the IGBT from experiencing damaging high voltages while allowing the IGBT to remain in the off state during DC voltage conditions
Solution Approach 2:
The operating parameters of the IGBT are changed by keeping it in the off state (gate-emitter voltage = 0V) during both surge and DC voltage conditions, rather than allowing it to conduct. This parameter change prevents the harmful effects of latch-up and DC current damage while the avalanche diode handles the voltage clamping function
2Reliability
If a stacked structure of low voltage device is used to take compatibility between breakdown current-voltage characteristic and surge withstanding capability, then the protection performance is improved, but the chip area increases and manufacturing cost increases
Solution Approach 1:
The avalanche diode and IGBT are merged into a single integrated structure where the avalanche diode is formed by diffusing a first conductivity type impurity into a semiconductor substrate of second conductivity type, and the IGBT is formed in the same substrate. This integration allows both protection functions to be achieved in a compact area without requiring separate stacked devices
Solution Approach 2:
The semiconductor device structure is designed to perform multiple functions: the avalanche diode provides voltage clamping during surge events, while the same structure also serves as the ESD protection circuit. The IGBT remains in the off state and provides additional protection against DC voltage, creating a multi-functional protective structure that reduces overall chip area
3Reliability
If a buried diffusion layer and deep high concentration diffusion layer are used to achieve breakdown current-voltage characteristic and surge withstanding capability, then the protection performance is improved, but the number of processing steps increases
Solution Approach 1:
The avalanche diode formation and IGBT formation processes are merged into a single integrated manufacturing flow. The avalanche diode is formed by diffusing impurity into the substrate, and subsequent processing steps form the IGBT structure in the same device, eliminating the need for separate processing sequences for each protective element
Solution Approach 2:
The impurity concentration and diffusion depth parameters are optimized to achieve both avalanche breakdown characteristic and IGBT formation in a coordinated manner. By controlling the diffusion parameters appropriately, the structure achieves surge withstanding capability without requiring excessive processing steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Ensures high performance ESD voltage withstand capability without increasing chip area, reducing manufacturing costs, and preventing device destruction from DC current, thus improving semiconductor device performance.
Implementation Method 1
an avalanche diode coupled at the anode thereof to the collector of the lateral IGBT and coupled at the cathode thereof to the first node
Data Source
AI summary
A semiconductor device includes a first node receiving an external voltage, a second node receiving a grounding voltage, a protection circuit, and a device to be protected coupled in parallel between the first and second nodes, in which the protection circuit includes a lateral IGBT having an emitter coupled to the second node and an avalanche diode having an anode coupled to the collector of the lateral IGBT and a cathode coupled to the first node, and a clamp driving circuit coupled between the first and second nodes, and coupled to the gate of the lateral IGBT.