Lateral IGBT Retrograde Base Doping for Latch-up and Resistance
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Solution Overview
Problem
Conventional lateral IGBTs face challenges in reducing on-state voltage and preventing latch-up while maintaining high breakdown voltage, due to limitations in controlling the current gain of parasitic NPN transistors and variations in device structure, which affect channel resistance and electric field distribution.
Innovation Solution
The device structure incorporates a first base region with a retrograde impurity concentration profile that increases under the emitter region, extending laterally under the gate electrode, and a low-concentration second base region, allowing for reduced current gain and increased breakdown voltage by optimizing impurity distribution and reducing base resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high-concentration P-type base contact diffusion region is inserted under the emitter region to reduce base resistance and prevent latch-up, then the current gain of parasitic NPN transistor is reduced, but the channel resistance increases when diffusion reaches under the gate electrode
Solution Approach 1:
The patent applies local quality by creating a retrograde doping profile where the P-type impurity concentration is highest at a depth below the surface (under the emitter region) and decreases toward the surface and laterally. This localized high-concentration region is positioned specifically to reduce base resistance and prevent latch-up without affecting the channel region under the gate electrode, thus resolving the contradiction between latch-up prevention and channel resistance control.
2Reliability
If the impurity concentration in the base region is increased to reduce the current gain of parasitic NPN transistor, then latch-up is prevented, but the breakdown voltage decreases
Solution Approach 1:
The retrograde doping profile concentrates high P-type impurity concentration at a specific depth below the surface rather than uniformly throughout the base region. This localized high-concentration region reduces the current gain of parasitic NPN transistor for latch-up prevention, while the lower concentration at the surface and in lateral regions maintains the breakdown voltage by preserving the electric field distribution necessary for high voltage operation.
3Reliability
If the base region width is increased to reduce the current gain of parasitic NPN transistor, then latch-up is prevented, but the channel resistance increases
Solution Approach 1:
The patent changes the impurity concentration parameter by implementing a retrograde doping profile where concentration varies with depth rather than being uniform. The peak concentration is positioned at a depth below the surface, creating a three-dimensional distribution that reduces base resistance and current gain without increasing the lateral base width, thereby preventing latch-up while maintaining low channel resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This structure effectively lowers on-state voltage, improves the safe operating area (SOA), and enhances the current capability of lateral IGBTs, particularly for high breakdown voltage applications, while maintaining process efficiency and reducing the need for complex process changes.
Implementation Method 1
a first base region with a retrograde impurity concentration profile that increases under the emitter region
Implementation Method 2
The common base current gain α of the parasitic NPN bipolar transistor is given by the following formula: α=[1−(DE/DP)(NB/NE)(W/LE)]·[1−W2/2LB2] where DE is the diffusion coefficient of minority carriers in the emitter region, DP is the diffusion coefficient of minority carriers in the base region
Data Source
AI summary
In a semiconductor device of the present invention, a first base region 16 is extended to a part under a gate electrode 7 while having a vertical concentration profile of an impurity that increases from the surface of a semiconductor layer 3 and becomes maximum under an emitter region 5, and the length in the lateral direction from a point where the impurity concentration becomes maximum located under an end of the gate electrode 7 to the boundary with a second base region 15 is not smaller than the length in the vertical direction from the point where the impurity concentration becomes maximum to the boundary with the second base region 15.