Lateral LDMOS Deep Trench Super-Junction for Low On-Resistance
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Solution Overview
Problem
Current high-voltage lateral double-diffused metal-oxide semiconductor (LDMOS) devices face challenges in implementing super-junction technology due to reliability issues and process complexities, particularly in achieving low on-resistance while maintaining device stability and cost-effectiveness.
Innovation Solution
A semi-lateral double-diffused metal-oxide semiconductor device is developed, featuring a deep trench isolation structure with alternately arranged P-type and N-type implantation regions at the bottom and sidewalls of the trench, which reduces surface electric fields and on-resistance without requiring high-energy implantation or thick photoresist processes, thereby enhancing reliability and process control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If super-junction technology is used to reduce on-resistance in LDMOS devices, then on-resistance decreases, but reliability deteriorates and process complexity increases
Solution Approach 1:
The patent extracts the super-junction concept from its traditional vertical implementation and adapts it to a lateral configuration. By taking out the essential feature of alternating P-N regions and repositioning them at the bottom of a deep trench isolation structure rather than in vertical columns, the invention achieves low on-resistance while avoiding the reliability issues associated with conventional lateral super-junction implementations.
Solution Approach 2:
The patent transitions from vertical super-junction structures to a lateral arrangement by placing alternating P-type and N-type implantation regions at the bottom of a deep trench isolation structure. This dimensional reconfiguration allows the super-junction effect to function in the lateral direction, reducing on-resistance without requiring high-energy implantation processes and maintaining device reliability.
2Manufacturing precision
If conventional lateral super-junction structures are used, then on-resistance is reduced, but manufacturing complexity increases due to high-energy implantation requirements
Solution Approach 1:
The patent changes the implantation energy parameter from high-energy to low-energy by repositioning the alternating P-N regions at the bottom of a deep trench isolation structure. This parameter change allows standard implantation processes to be used instead of high-energy implantation, significantly simplifying manufacturing while still achieving the desired low on-resistance through the super-junction effect.
3Reliability
If deep trench isolation structure with alternating P-N implantation regions is used, then on-resistance is reduced and reliability is improved, but device structure becomes more complex
Solution Approach 1:
The deep trench isolation structure serves multiple functions simultaneously: it provides electrical isolation between devices, hosts the alternating P-N implantation regions for super-junction action, and defines the lateral diffusion path. By making the isolation structure multi-functional, the invention achieves low on-resistance and high reliability without adding separate complex components.
Solution Approach 2:
The patent merges the isolation structure with the super-junction formation by placing the alternating P-N implantation regions within the deep trench isolation structure. This merging combines what would traditionally be separate features (isolation and super-junction), reducing overall device complexity while achieving both low on-resistance and high reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure improves the reliability and performance of LDMOS devices by reducing on-resistance and eliminating high-energy implantation requirements, while also lowering production costs and simplifying the manufacturing process.
Implementation Method 1
a first P-type implantation region and a first N-type implantation region are alternately arranged at a bottom of the deep trench isolation structure
Implementation Method 2
a first P-type implantation region and a first N-type implantation region are alternately arranged at a bottom of the deep trench isolation structure
Data Source
AI summary
A lateral double-diffused metal oxide semiconductor component and a manufacturing method therefor. The lateral double-diffused metal oxide semiconductor component comprises: a semiconductor substrate, the semiconductor substrate being provided thereon with a drift area; the drift area being provided therein with a trap area and a drain area, the trap area being provided therein with an active area and a channel; the drift area being provided therein with a deep trench isolation structure arranged between the trap area and the drain area, and the deep trench isolation structure being provided at the bottom thereof with alternately arranged first p-type injection areas and first n-type injection areas.